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IDT72V245L10PFI PDF预览

IDT72V245L10PFI

更新时间： 2024-01-08 13:00:00
品牌 Logo 应用领域
艾迪悌 - IDT 先进先出芯片
页数 文件大小 规格书
25页 216K
描述
3.3 VOLT CMOS SyncFIFO 256 x 18, 512 x 18, 1,024 x 18, 2,048 x 18, and 4,096 x 18

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IDT72V245L10PFI 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：QFP
包装说明：QFP, QFP64,.47SQ,20针数：64
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.32.00.71风险等级：5.23
最长访问时间：6.5 ns其他特性：EASILY EXPANDABLE IN DEPTH AND WIDTH
最大时钟频率 (fCLK)：100 MHz周期时间：10 ns
JESD-30 代码：S-PQFP-G64JESD-609代码：e3
长度：10 mm内存密度：73728 bit
内存集成电路类型：OTHER FIFO内存宽度：18
湿度敏感等级：3功能数量：1
端子数量：64字数：4096 words
字数代码：4000工作模式：SYNCHRONOUS
最高工作温度：70 °C最低工作温度：
组织：4KX18可输出：YES
封装主体材料：PLASTIC/EPOXY封装代码：QFP
封装等效代码：QFP64,.47SQ,20封装形状：SQUARE
封装形式：FLATPACK并行/串行：PARALLEL
峰值回流温度（摄氏度）：260电源：3.3 V
认证状态：Not Qualified座面最大高度：1.6 mm
最大待机电流：0.005 A子类别：FIFOs
最大压摆率：0.03 mA最大供电电压 (Vsup)：3.6 V
最小供电电压 (Vsup)：3 V标称供电电压 (Vsup)：3.3 V
表面贴装：YES技术：CMOS
温度等级：COMMERCIAL端子面层：Matte Tin (Sn) - annealed
端子形式：GULL WING端子节距：0.5 mm
端子位置：QUAD处于峰值回流温度下的最长时间：30
宽度：10 mmBase Number Matches：1

IDT72V245L10PFI 数据手册

 浏览型号IDT72V245L10PFI的Datasheet PDF文件第1页浏览型号IDT72V245L10PFI的Datasheet PDF文件第2页浏览型号IDT72V245L10PFI的Datasheet PDF文件第4页浏览型号IDT72V245L10PFI的Datasheet PDF文件第5页浏览型号IDT72V245L10PFI的Datasheet PDF文件第6页浏览型号IDT72V245L10PFI的Datasheet PDF文件第7页 
IDT72V205/72V215/72V225/72V235/72V245 3.3V CMOS SyncFIFOTM  
256 x 18, 512 x 18, 1,024 x 18, 2,048 x 18 and 4,096 x 18  
COMMERCIALANDINDUSTRIAL  
TEMPERATURERANGES  
PINDESCRIPTION  
Symbol  
Name  
I/O  
Datainputsforan18-bitbus.  
Description  
D0–D17 DataInputs  
I
I
RS  
Reset  
WhenRSissetLOW,internalreadandwritepointersaresettothefirstlocationoftheRAMarray,FFandPAF  
go HIGH, and PAE and EF go LOW. A reset is required before an initial WRITE after power-up.  
WCLK  
WriteClock  
I
I
WhenWENisLOW,dataiswrittenintotheFIFOonaLOW-to-HIGHtransitionofWCLK,iftheFIFOisnotfull.  
WhenWENis LOW,datais writtenintotheFIFOonevery LOW-to-HIGHtransitionofWCLK.When WENis  
HIGH, the FIFOholds the previous data. Data willnotbe writtenintothe FIFOifthe FF is LOW.  
WEN  
WriteEnable  
RCLK  
ReadClock  
ReadEnable  
I
I
WhenRENisLOW,dataisreadfromtheFIFOonaLOW-to-HIGHtransitionofRCLK,iftheFIFOisnotempty.  
WhenRENisLOW,dataisreadfromtheFIFOoneveryLOW-to-HIGHtransitionofRCLK. WhenRENisHIGH,  
the outputregisterholds the previous data. Data willnotbe readfromthe FIFOifthe EF is LOW.  
REN  
OE  
LD  
OutputEnable  
Load  
I
I
WhenOEisLOW,thedataoutputbusisactive.IfOEisHIGH,theoutputdatabuswillbeinahigh-impedance  
state.  
WhenLDisLOW,dataontheinputsD0–D11iswrittentotheoffsetanddepthregistersontheLOW-to-HIGH  
transitionoftheWCLK,whenWENisLOW.WhenLD isLOW,dataontheoutputsQ0–Q11isreadfromthe  
offsetanddepthregistersontheLOW-to-HIGHtransitionoftheRCLK, whenRENisLOW.  
FL  
FirstLoad  
I
I
Inthesingledeviceorwidthexpansionconfiguration,FLtogetherwithWXIandRXIdetermineifthemodeis  
IDT Standard mode or First Word Fall Through (FWFT) mode, as well as whether the PAE/PAF flags are  
synchronous or asynchronous. (See Table 1.) In the Daisy Chain Depth Expansion configuration, FL is  
grounded on the first device (first load device) and set to HIGH for all other devices in the Daisy Chain.  
WXI  
RXI  
FF/IR  
WriteExpansion  
Input  
In thesingledeviceorwidthexpansionconfiguration,WXItogetherwithFL andRXIdetermineifthemode  
isIDTStandardmodeorFWFTmode,aswellas whetherthePAE/PAFflagsaresynchronousorasynchronous.  
(SeeTable1.) IntheDaisyChainDepthExpansionconfiguration,WXIisconnectedtoWXO(WriteExpansion  
Out)ofthe previous device.  
ReadExpansion  
Input  
I
Inthesingledeviceorwidthexpansionconfiguration,RXI togetherwithFL andWXI,determineifthemode  
isIDTStandardmodeorFWFTmode,aswellas whetherthePAE/PAFflagsaresynchronousorasynchronous.  
(SeeTable1.) IntheDaisyChainDepthExpansionconfiguration,RXIisconnectedtoRXO(ReadExpansion  
Out)ofthe previous device.  
Full Flag/  
Input Ready  
O
IntheIDTStandardmode,theFFfunctionisselected.FFindicateswhetherornottheFIFOmemoryisfull.In  
theFWFTmode,theIRfunctionisselected. IRindicateswhetherornotthereisspaceavailableforwritingto  
theFIFOmemory.  
EF/OR  
EmptyFlag/  
OutputReady  
O
O
IntheIDTStandardmode,theEFfunctionisselected.EFindicateswhetherornottheFIFOmemoryisempty.  
InFWFTmode,theORfunctionisselected.ORindicateswhetherornotthereisvaliddataavailableattheoutputs.  
WhenPAEisLOW,theFIFOisalmost-emptybasedontheoffsetprogrammedintotheFIFO.Thedefault  
offsetatresetis31fromemptyforIDT72V205,63fromemptyforIDT72V215,and127fromemptyforIDT72V225/  
72V235/72V245.  
PAE  
Programmable  
Almost-EmptyFlag  
PAF  
Programmable  
Almost-FullFlag  
O
O
WhenPAFisLOW,theFIFOisalmost-fullbasedontheoffsetprogrammedintotheFIFO.Thedefaultoffsetat  
resetis31fromfullforIDT72V205,63fromfullforIDT72V215,and127fromfullforIDT72V225/72V235/72V245.  
WXO/HF WriteExpansion  
Inthesingledeviceorwidthexpansionconfiguration,thedeviceismorethanhalffullwhenHFisLOW.Inthe  
depthexpansionconfiguration,apulseissentfromWXOtoWXIofthenextdevicewhenthelastlocationinthe  
FIFOiswritten.  
Out/Half-FullFlag  
RXO  
ReadExpansion  
Out  
O
O
Inthe depthexpansionconfiguration, a pulse is sentfromRXO toRXI ofthe nextdevice whenthe last  
locationinthe FIFOis read.  
Q0–Q17 DataOutputs  
Dataoutputsforan18-bitbus.  
+3.3V power supply pins.  
Seven ground pins.  
VCC  
Power  
GND  
Ground  
3
1234567...25

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