Datasheet > ICS9DB803DGILFT

ICS9DB803DGILFT

更新时间： 2022-02-26 13:27:52

品牌	Logo	应用领域
艾迪悌 - IDT		PC
页数	文件大小	规格书
21页	254K
描述
Eight Output Differential Buffer for PCIe Gen 2

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ICS9DB803DGILFT 数据手册

DATASHEET

ICS9DB803DI

Eight Output Differential Buffer for PCIe Gen 2

Description

Features/Benefits

The 9DB803 is a DB800 Version 2.0 Yellow Cover part with PCI

Express Gen II support. It can be used in PC or embedded

systems to provide outputs that have low cycle-to-cycle jitter

(50ps), low output-to-output skew (100ps), and are PCI Express

Gen 2 compliant. The 9DB803 supports a 1 to 8 output

configuration, taking a spread or non spread differential HCSL

input from a CK410(B) main clock such as 954101 and

932S401, or any other differential HCSL pair. 9DB803 can

generate HCSL or LVDS outputs from 50 to 100MHz in PLL

mode or 50 to 400Mhz in bypass mode. There are two de-

jittering modes available selectable through the HIGH_BW#

input pin, high bandwidth mode provides de-jittering for spread

inputs and low bandwidth mode provides extra de-jittering for

non-spread inputs. The SRC_IN#, PD#, and individual OE real-

time input pins provide completely programmable power

management control.

•

Spread spectrum modulation tolerant, 0 to -0.5% down

spread and +/- 0.25% center spread.

•

Supports undriven differential outputs in PD# and

SRC_STOP# modes for power management.

Output Features

•

8 - 0.7V current-mode differential output pairs

Supports zero delay buffer mode and fanout mode

Bandwidth programming available

Key Specifications

•

Outputs cycle-cycle jitter < 50ps

Outputs skew: 50ps

50-100 MHz operation in PLL mode

50-400 MHz operation in Bypass mode

Phase jitter: PCIe Gen1 < 86ps peak to peak

Phase jitter: PCIe Gen2 < 3.1ps rms

48-pin SSOP/TSSOP package

Available in RoHS compliant packaging

Funtional Block Diagram

OE_(7:0)

SPREAD

COMPATIBLE

PLL

SRC_IN

SRC_IN#

STOP

LOGIC

DIF(7:0))

SRC_STOP#

HIGH_BW#

CONTROL

LOGIC

BYPASS#/PLL

PD#

IREF

SDATA

SCLK

LOCK

Note: Polarities shown for OE_INV = 0.

IDT^TM/ICS^TMEight Output Differential Buffer for PCIe Gen 2

ICS9DB803DI

REV A 06/18/08

12 3 4 5 6 7...21

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