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ICM7555 PDF预览

ICM7555

更新时间: 2024-01-09 00:49:00
品牌 Logo 应用领域
恩智浦 - NXP /
页数 文件大小 规格书
9页 109K
描述
General purpose CMOS timer

ICM7555 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:, CAN8,.2Reach Compliance Code:unknown
风险等级:5.92JESD-30 代码:O-MBCY-W8
JESD-609代码:e0端子数量:8
最高工作温度:125 °C最低工作温度:-55 °C
封装主体材料:METAL封装等效代码:CAN8,.2
封装形状:ROUND封装形式:CYLINDRICAL
电源:5 V认证状态:Not Qualified
筛选级别:MIL-STD-883 Class C子类别:Analog Waveform Generation Functions
标称供电电压 (Vsup):5 V技术:CMOS
温度等级:MILITARY端子面层:Tin/Lead (Sn/Pb)
端子形式:WIRE端子位置:BOTTOM
Base Number Matches:1

ICM7555 数据手册

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Philips Semiconductors Linear Products  
Product specification  
General purpose CMOS timer  
ICM7555  
improved over the standard bipolar 555 in that it controls only the  
internal flip-flop, which in turn controls simultaneously the state of  
the OUTPUT and DISCHARGE pins. This avoids the multiple  
threshold problems sometimes encountered with slow falling edges  
in the bipolar devices.  
Astable Operation  
If the circuit is connected as shown in Figure 2, it will trigger itself  
and free run as a multivibrator. The external capacitor charges  
through R and R and discharges through R only. Thus, the duty  
A
B
B
cycle (D) may be precisely set by the ratio of these two resistors. In  
this mode of operation, the capacitor charges and discharges  
V
DD  
between 1/3 V and 2/3 V . Since the charge rate and the  
DD  
DD  
V
threshold levels are directly proportional to the supply voltage, the  
frequency of oscillation is independent of the supply voltage.  
1
8
DD  
GND  
R
A
2
3
7
6
DISHCARGE  
THRESHOLD  
TRIGGER  
OUTPUT  
RESET  
R
+ R  
B
1.38  
(R + 2R )  
A
A
F =  
D =  
OUTPUT  
C
B
R + 2R  
A B  
R
B
4
5
CONTROL  
VOLTAGE  
V
Monostable Operation  
DD  
In this mode of operation, the timer functions as a one-shot. Initially,  
the external capacitor (C) is held discharged by a transistor inside  
the timer. Upon application of a negative pulse to Pin 2,TRIGGER,  
the internal flip-flop is set which releases the low impedance on  
DISCHARGE; the external capacitor charges and drives the  
OUTPUT High. The voltage across the capacitor increases  
C
exponentially with a time constant t = R C. When the voltage  
across the capacitor equals 2/3 V , the comparator resets the  
A
Figure 2. Astable Operation  
+
flip-flop, which in turn discharges the capacitor rapidly and also  
drives the OUTPUT to its low state. TRIGGER must return to a high  
state before the OUTPUT can return to a low state.  
V
DD  
R
A
1
8
7
Control Voltage  
The CONTROL VOLTAGE terminal permits the two trip voltages for  
the THRESHOLD and TRIGGER internal comparators to be  
controlled. This provides the possibility of oscillation frequency  
modulation in the astable mode, or even inhibition of oscillation,  
depending on the applied voltage. In the monostable mode, delay  
times can be changed by varying the applied voltage to the  
CONTROL VOLTAGE pin.  
2
3
DISHCARGE  
THRESHOLD  
TRIGGER  
OUTPUT  
RESET  
6
5
4
CONTROL  
VOLTAGE  
OPTIONAL  
CAPACITOR  
C
V
DD  
< 18V  
RESET  
The RESET terminal is designed to have essentially the same trip  
voltage as the standard bipolar 555, i.e., 0.6 to 0.7V. At all supply  
voltages it represents an extremely high input impedance. The  
mode of operation of the RESET function is, however, much  
t = 1.05 R  
C
A
Figure 3. Monostable Operation  
345  
August 31, 1994  

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