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IC-MPDFN10

更新时间： 2024-02-05 08:06:09
品牌 Logo 应用领域
ICHAUS 输出元件编码器
页数 文件大小 规格书
22页 1471K
描述
8-BIT HALL ANGLE ENCODER WITH RATIOMETRIC OUTPUT

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中文翻译

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IC-MPDFN10 数据手册

 浏览型号IC-MPDFN10的Datasheet PDF文件第3页浏览型号IC-MPDFN10的Datasheet PDF文件第4页浏览型号IC-MPDFN10的Datasheet PDF文件第5页浏览型号IC-MPDFN10的Datasheet PDF文件第7页浏览型号IC-MPDFN10的Datasheet PDF文件第8页浏览型号IC-MPDFN10的Datasheet PDF文件第9页 
iC-MP 8-BIT HALL ANGLE ENCODER  
WITH RATIOMETRIC OUTPUT  
Rev B1, Page 6/22  
ELECTRICAL CHARACTERISTICS  
Operating Conditions: VDD = 5 V ±10 % , Tj = -40 ... 125 °C, unless otherwise stated  
Item Symbol  
No.  
Parameter  
Conditions  
Unit  
Min.  
Typ.  
Max.  
General  
001 VDD  
002 I(VDD)  
Supply Voltage  
4.5  
5
8
5.5  
12  
V
mA  
µA  
V
Supply Current in VDD  
PSMI = lo, other pins open  
PSMI = hi  
003 I(VDD)sb Standby Supply Current  
200  
4.1  
3.9  
004 VDDon  
005 VDDoff  
006 VDDhys  
Power-On Threshold  
Power-Down Threshold  
Hysteresis  
Increasing voltage VDD  
Decreasing voltage VDD  
VDDhys = VDDon - VDDoff  
3.0  
2.6  
200  
V
mV  
ms  
007  
ton()1  
Turn-On Delay Following  
Power-On  
Time to data valid after enabling,  
VDD: VDDoff → VDDon  
Time to data valid after standby,  
PSMI: hi → lo  
VDD = 0 V; I() = 1 mA  
VDD = 0 V; I() = 4 mA  
I() = -4 mA  
1
008  
ton()2  
Turn-On Delay Following Standby  
900  
1.6  
1.6  
-0.3  
µs  
V
009 Vc()hi  
010 Vc()hi  
011 Vc()lo  
Clamp Voltage hi at  
PSMI, MA, SLI, NERR  
0.3  
0.3  
Clamp Voltage hi at  
PSMO, LAO, SLO  
V
Clamp Voltage lo at  
-1.5  
V
PSMI, PSMO, LAO, MA, SLO,  
SLI, NERR, VDD, VZAP  
Hall Sensor Array  
101 Hext  
Operating Magnetic Field  
Strength  
At surface of chip  
20  
50  
100  
kA/m  
102 RPM  
103 ferr()  
104 fmag()  
105 dsens  
106 xpac  
107 φpac  
108 hpac  
Permissible RPM Speed  
Excessive Frequency Alarm  
Magnetic Field Frequency  
Diameter of Hall Sensor Array  
Chip Placement Tolerance  
Chip Tilt Angle  
12 000  
rpm  
kHz  
Hz  
ENERR(1) = 1; NERR: hi → lo  
1
2
200  
mm  
mm  
DEG  
µm  
Versus DFN10 package outlines  
Versus DFN10 package outlines  
-0.2  
-3  
0.2  
3
Distance Surface of Package to DFN10 package  
Surface of Chip  
400  
Sine-To-Digital Converter  
301 RES  
302 HYS  
303 AAabs  
Converter Resolution  
Per 360 degree  
8
bit  
Converter Hysteresis  
1.4  
DEG  
DEG  
Absolute Angle Accuracy  
Magnet with 4 mm in diameter, axis centered to  
chip  
-3  
-1  
3
1
D/A Converter And Ratiometric Output LAO  
401  
RES()  
D/A Converter Resolution  
MODE(1:0) = 00 (range 360°)  
MODE(1:0) = 01 (range 270°)  
MODE(1:0) = 10 (range 180°)  
MODE(1:0) = 11 (range 90°)  
8
7.5  
7
bit  
bit  
bit  
bit  
6
402 Iload()  
Permissible Output Current  
mA  
403  
dV0()hi  
Output Voltage hi, Rail-To-Rail  
dV0()hi = V(VDD) - V(LAO), MODE(3) = 0;  
I() = -1 mA  
I() = 0 mA  
170  
85  
mV  
mV  
404  
dV0()lo  
Output Voltage lo, Rail-To-Rail  
MODE(3) = 0;  
I() = 1 mA  
170  
85  
mV  
mV  
I() = 0 mA  
405 dV1()hi  
406 dV1()lo  
407 Ilk()  
Output Voltage hi, 10/90% Range MODE(3) = 1; I() = -1...+1 mA  
Output Voltage lo, 10/90% Range MODE(3) = 1; I() = -1...+1 mA  
85  
5
95  
15  
5
%VDD  
%VDD  
µA  
Leakage Current  
Slew Rate hi  
V(LAO) = 0...VDD, PSMI = hi  
V(LAO): 20% → 80% of range  
V(LAO): 80% → 20% of range  
-5  
2
408 SR()hi  
409 SR()lo  
V/µs  
Slew Rate lo  
2
V/µs  
Zapping Input VZAP  
501 Vt1()hi  
502 Vt1()lo  
Voltage Threshold hi vs. GND  
Voltage Threshold lo vs. GND  
2
V
V
0.8  
1...3456789...22

中文翻译

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