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I5116EY PDF预览

I5116EY

更新时间: 2024-02-11 07:15:06
品牌 Logo 应用领域
新唐 - NUVOTON 蜂窝移动电话便携式设备光电二极管商用集成电路
页数 文件大小 规格书
90页 678K
描述
SINGLE-CHIP

I5116EY 技术参数

生命周期:Obsolete零件包装代码:TSOP
包装说明:TSOP1,针数:28
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.84应用:CELLULAR PHONE; PORTABLE APPLIANCES
商用集成电路类型:SPEECH SYNTHESIZER WITH RCDGJESD-30 代码:R-PDSO-G28
JESD-609代码:e4长度:11.8 mm
功能数量:1端子数量:28
片上内存类型:FLASH最高工作温度:70 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:TSOP1封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE认证状态:Not Qualified
最长读取时间:960 s座面最大高度:1.25 mm
最大供电电压 (Vsup):3.3 V最小供电电压 (Vsup):2.7 V
表面贴装:YES温度等级:COMMERCIAL
端子面层:NICKEL PALLADIUM GOLD端子形式:GULL WING
端子节距:0.55 mm端子位置:DUAL
宽度:8 mm

I5116EY 数据手册

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ISD5100 SERIES  
5. PIN DESCRIPTION  
Pin Name  
SCL  
SOIC/PDIP TSOP  
Functionality  
1
2
3
8
9
10  
I2C Serial Clock Line: to clock the data into and out of the I2C interface.  
Input pin that supplies the LSB +1 bit for the I2C Slave Address.  
A1  
SDA  
I2C Serial Data Line: Data is passed between devices on the bus over  
this line.  
A0  
VSSD  
4
5,6  
11  
12,13  
Input pin that supplies the LSB for the I2C Slave Address.  
Digital Ground.  
NC  
MIC+  
7,21,22  
8
1,14,28 No Connect.  
16  
Differential Positive Input for the microphone amplifier.  
VSSA  
MIC-  
ANA OUT+  
ANA OUT-  
ACAP  
9,15,23  
10  
2,15,22 Analog Ground.  
17  
18  
19  
20  
Differential Negative Input for the microphone amplifier.  
Differential Positive Analog Output for ANA OUT.  
Differential Negative Analog Output for ANA OUT.  
11  
12  
13  
AGC/AutoMute Capacitor: Required for the on-chip AGC amplifier during  
record and AutoMute function during playback.  
SP-  
14  
21  
Differential Negative Speaker Output: When the speaker outputs are in  
use, the AUX OUT output is disabled.  
SP+  
VCCA  
16  
17  
23  
24  
Differential Positive Speaker Output.  
Analog Supply Voltage: This pin supplies power to the analog sections  
of the device. It should be carefully bypassed to Analog Ground to  
insure correct device operation.  
ANA IN  
AUX IN  
AUX OUT  
18  
19  
20  
25  
26  
27  
Analog Input: one of the analog inputs with selectable gain.  
Auxiliary Input: one of the analog inputs with selectable gain.  
Auxiliary Output: one the analog outputs of the device. When this  
output is used, the SP+ and SP- outputs are disabled.  
RAC  
INT  
24  
3
Row Address Clock; an open drain output. The RAC pin goes LOW  
[1]  
TRACL before the end of each row of memory and returns HIGH at  
exactly the end of each row of memory.  
25  
4
Interrupt Output; an open drain output that indicates that a set EOM bit  
has been found during Playback or that the chip is in an Overflow (OVF)  
condition. This pin remains LOW until a Read Status command is  
executed.  
XCLK  
VCCD  
26  
5
This pin must be grounded for utilizing internal clock. For precision  
timing control, external clock signal can be applied through this pin.  
27,28  
6,7  
Digital Supply Voltage. These pins supply power to the digital sections  
of the device. They must be carefully bypassed to Digital Ground to  
insure correct device operation.  
[1] See the Parameters section  
Publication Release Date: Oct 31, 2008  
- 8 -  
Revision 1.42  

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