Datasheet > HV66PJ-GM903

HV66PJ-GM903

更新时间： 2024-01-05 02:21:18

品牌	Logo	应用领域
超科 - SUPERTEX		驱动
页数	文件大小	规格书
7页	733K
描述
LIQUID CRYSTAL DISPLAY DRIVER

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中文翻译

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数据手册

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HV66PJ-GM903 数据手册

Supertex inc.

HV66

32-Channel LCD Driver

with Separate Backplane Output

Features

General Description

► HVCMOS^®technology

The HV66 is a low voltage serial to high voltage parallel converter

with push-pull outputs. This device has been designed for use as

a driver circuit for LCD displays. It can also be used in any appli-

cation requiring multiple output high voltage current sourcing and

sinking capabilities. The inputs are fully CMOS compatible.

► 32 push-pull CMOS output up to 60V

► Low power level shifting

► Shift register speed 5.0MHz

► Latched data outputs

► Bidirectional shift register (DIR)

► Backplane output

The device consists of a 32-bit shift register, 32 latches, and con-

trol logic to perform blanking and polarity control of the outputs.

HV_OUT1 is connected to the ﬁrst stage of the shift register. Data is

shifted through the shift register on the logic rising transition of the

clock. A DIR pin causes data shifting clockwise when grounded

and counter clockwise when connected to VDD. A data output

buffer is provided for cascading devices. This output reﬂects the

current status of the last bit of the shift register. Operation of the

shift register is not affected by the LE (latch enable), BL (blank) or

the POL (polarity) inputs. Transfer of data from the shift register to

the latch occurs when the LE (latch enable) input is high. The data

in the latch is stored after LE transitions from high to low.

Functional Block Diagram

VPP

POL

VDD

HV_OUT

DATA IN

Latch

CLK

32-Bit

(Outputs 3 to 30

not shown)

Shift

DIR

HV_OUT31

Latch

DATA OUT

GND

HV_OUT32

BP_OUT

Doc.# DSFP-HV66

C070313

Supertex inc.

www.supertex.com

12 3 4 5 6 7

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