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HV5522PG-G PDF预览

HV5522PG-G

更新时间: 2024-02-28 06:11:51
品牌 Logo 应用领域
美国微芯 - MICROCHIP 驱动接口集成电路
页数 文件大小 规格书
18页 804K
描述
EL DISPLAY DRIVER, PQFP44

HV5522PG-G 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:QFP,Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:1.67数据输入模式:SERIAL
显示模式:DOT MATRIX接口集成电路类型:EL DISPLAY DRIVER
JESD-30 代码:S-PQFP-G44JESD-609代码:e3
长度:10 mm复用显示功能:NO
功能数量:1区段数:32
端子数量:44最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:QFP封装形状:SQUARE
封装形式:FLATPACK峰值回流温度(摄氏度):260
认证状态:Not Qualified座面最大高度:2.35 mm
最大供电电压:13.2 V最小供电电压:10.8 V
标称供电电压:12 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:MATTE TIN端子形式:GULL WING
端子节距:0.8 mm端子位置:QUAD
处于峰值回流温度下的最长时间:40宽度:10 mm
最小 fmax:8 MHzBase Number Matches:1

HV5522PG-G 数据手册

 浏览型号HV5522PG-G的Datasheet PDF文件第2页浏览型号HV5522PG-G的Datasheet PDF文件第3页浏览型号HV5522PG-G的Datasheet PDF文件第4页浏览型号HV5522PG-G的Datasheet PDF文件第5页浏览型号HV5522PG-G的Datasheet PDF文件第6页浏览型号HV5522PG-G的Datasheet PDF文件第7页 
HV5522  
32-Channel Serial-to-Parallel Converter with Open Drain Outputs  
Features  
General Description  
• 100 mA Minimum Sink Current  
• 8 MHz Shift Register Speed  
The HV5522 is  
serial-to-parallel converter with open drain outputs.  
This device is designed as driver for AC  
electroluminescent displays. It can also be used in any  
application requiring multiple-output high-voltage  
current sinking capabilities, such as driving inkjet and  
electrostatic print heads, plasma panels, vacuum  
fluorescent and large matrix LCD displays.  
a
low-voltage to high-voltage  
a
• Polarity and Blanking Inputs  
• CMOS-compatible Inputs  
• Forward and Reverse Shifting Options  
• Diode to VPP allows Efficient Power Recovery  
Applications  
This device consists of a 32-bit Shift register, 32 latches  
and control logic to perform the polarity select and  
blanking of the outputs. Data is shifted through the Shift  
register on the high-to-low transition of the clock. The  
HV5522 shifts the data counter clockwise when viewed  
from the top of the package. A data output buffer is  
provided for cascading devices. This output reflects the  
current status of the last bit of the Shift register. The  
operation of the Shift register is not affected by the latch  
enable (LE), blanking (BL) and polarity (POL) inputs.  
The transfer of data from the Shift register to the latch  
occurs when the LE input is high. The data in the latch  
is stored when LE is low.  
• Inkjet and Electrostatic Print Heads  
• AC-electroluminescent Displays  
• Microelectromechanical Systems Applications  
Package Types  
44-lead PQFP  
44-lead PLCC  
(Top view)  
(Top view)  
6
40  
1 44  
44  
1
See Table 2-1 and Table 2-2 for pin information.  
2017 Microchip Technology Inc.  
DS20005699A-page 1  
 

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