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HV2808 PDF预览

HV2808

更新时间: 2022-02-26 12:06:28
品牌 Logo 应用领域
超科 - SUPERTEX /
页数 文件大小 规格书
7页 661K
描述
Low Harmonic Distortion, 32-Channel, High Voltage Analog Switch IC

HV2808 数据手册

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HV2808  
Pin Configuration  
Ordering Information  
56  
Part Number  
Package Option  
Packing  
1
HV2808K6-G  
56-Lead QFN (8x8)  
56-Lead QFN (8x8)  
250/Tray  
HV2808K6-G M937  
2000/Reel  
-G indicates package is RoHS compliant (‘Green’)  
Absolute Maximum Ratings  
Parameter  
Value  
56-Lead QFN  
(top view)  
VDD logic supply  
-0.5V to +6.5V  
220V  
VPP-VNN differential supply  
VPP positive supply  
Product Marking  
-0.5V to VNN +200V  
+0.5V to -200V  
-0.5V to VDD +0.3V  
VNN to VPP  
L = Lot Number  
YY = Year Sealed  
VNN negative supply  
HV2808K6  
LLLLLLLLL  
YYWW  
Logic input voltage  
WW = Week Sealed  
A = Assembler ID  
Analog signal range  
C = Country of Origin  
AAA CCC  
Peak analog signal current/channel  
Storage temperature  
Thermal resistance, θja  
Thermal resistance, θjc  
3.0A  
= “Green” Packaging  
-65°C to 150°C  
27OC/W  
Package may or may not include the following marks: Si or  
56-Lead QFN  
0.5OC/W  
Absolute Maximum Ratings are those values beyond which damage to the device  
may occur. Functional operation under these conditions is not implied. Continuous  
operation of the device at the absolute rating level may affect device reliability. All  
voltages are referenced to device ground.  
Typical Thermal Characteristics  
Package  
θja  
56-Lead QFN (K6)  
21OC/W  
Recommended Operating Conditions  
Sym  
VDD  
VPP  
VNN  
VIH  
Parameter  
Value  
Logic power supply voltage  
Positive high voltage supply  
Negative high voltage supply  
High level input voltage  
3.0 to 5.5V  
+40 to VNN +200V  
-40 to -160V  
0.9VDD to VDD  
0 to 0.1VDD  
VIL  
Low level input voltage  
VSIG  
TA  
Analog signal voltage peak-to-peak  
Operating free air temperature  
VNN +10V to VPP -10V  
0 to 70OC  
Notes:  
1.  
2.  
3.  
Power up/down sequence is arbitrary except GND must be powered-up first and powered-down last.  
VSIG must be VNN ≤ VSIG ≤ VPP or floating during power up/down transition.  
Rise and fall times of power supplies VDD, VPP, and VNN should not be less than 1.0msec.  
Doc.# DSFP-HV2808  
C121712  
Supertex inc.  
www.supertex.com  
2

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