Datasheet > HT32F0006

HT32F0006

更新时间： 2024-03-03 10:10:24

品牌	Logo	应用领域
台湾合泰/盛群 - HOLTEK		/
页数	文件大小	规格书
49页	1904K
描述
32-bit Arm? Cortex?-M0+ Music Synthesizer MCU

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HT32F0006 数据手册

32-Bit Arm^®Cortex^®-M0+ Music Synthesizer MCU

HT32F0006

List of Figures

Figure 1. Block Diagram ......................................................................................................................... 17

Figure 2. Memory Map............................................................................................................................ 18

Figure 3. Clock Structure........................................................................................................................ 21

Figure 4. 48-pin LQFP Pin Assignment................................................................................................... 22

Figure 5. 64-pin LQFP Pin Assignment................................................................................................... 23

Figure 6. ADC Sampling Network Model ................................................................................................ 36

Figure 7. I²C Timing Diagrams................................................................................................................ 37

Figure 8. Timing of I²S Master Mode ...................................................................................................... 38

Figure 9. Timing of I²S Slave Mode ........................................................................................................ 38

Figure 10. SPI Timing Diagrams – SPI Master Mode............................................................................. 40

Figure 11. SPI Timing Diagrams – SPI Slave Mode with CPHA = 1....................................................... 40

Figure 12. QSPI Timing Diagrams – QSPI Master Mode (1-bit Serial Mode, DUALEN = 0, QUADEN = 0).. 42

Figure 13. QSPI Timing Diagrams – QSPI Master Mode (Dual Mode, DUALEN = 1)............................ 42

Figure 14. QSPI Timing Diagrams – QSPI Master Mode (Quad Mode, QUADEN = 1).......................... 43

Figure 15. QSPI Timing Diagrams – QSPI Slave Mode with CPHA = 1 (1-bit Serial Mode)................... 44

Figure 16. USB Signal Rise Time and Fall Time and Cross-Point Voltage (V_CRS) Deﬁnition .................. 45

Rev. 1.10

5 of 49

April 21, 2023

1 2 3 456 7 8...49

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