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HMC699LP5ETR PDF预览

HMC699LP5ETR

更新时间: 2024-02-24 09:24:37
品牌 Logo 应用领域
亚德诺 - ADI ATM异步传输模式电信电信集成电路
页数 文件大小 规格书
13页 1027K
描述
7 GHz Integer-N Synthesizer SMT

HMC699LP5ETR 技术参数

生命周期:Transferred包装说明:HVQCCN,
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.79JESD-30 代码:S-PQCC-N32
长度:5 mm功能数量:1
端子数量:32最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:HVQCCN封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE座面最大高度:1 mm
标称供电电压:5 V表面贴装:YES
电信集成电路类型:ATM/SONET/SDH SUPPORT CIRCUIT温度等级:INDUSTRIAL
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD宽度:5 mm
Base Number Matches:1

HMC699LP5ETR 数据手册

 浏览型号HMC699LP5ETR的Datasheet PDF文件第2页浏览型号HMC699LP5ETR的Datasheet PDF文件第3页浏览型号HMC699LP5ETR的Datasheet PDF文件第4页浏览型号HMC699LP5ETR的Datasheet PDF文件第5页浏览型号HMC699LP5ETR的Datasheet PDF文件第6页浏览型号HMC699LP5ETR的Datasheet PDF文件第7页 
HMC699LP5 / 699LP5E  
v05.0110  
7 GHz INTEGER N SYNTHESIZER  
CONTINUOUS (N = 56 - 519), NON-CONTINUOUS (N = 16 - 54)  
Typical Applications  
Features  
Ultra Low ssB Pꢀaꢁe Noiꢁe Floor:  
-153 dBc/hꢃ @ 10 khꢃ offꢁet @ 100 Mhꢃ  
Reference Frequencꢂ.  
Tꢀe hMC699LP5(E) iꢁ ideal for:  
• satellite Communication sꢂꢁtemꢁ  
• Point-to-Point Radioꢁ  
Programmable Divider (N = 16 - 519)  
Operating up to 7 Ghꢃ  
• Militarꢂ Applicationꢁ  
• sonet Clock Generation  
Open Collector Output Buffer Amplifierꢁ for  
Interfacing w/ Op-Amp Baꢁed Loop Filter  
Reverꢁible Polaritꢂ PFD w/ Lock Detect Output  
32 Lead 5x5mm sMT Package: 25mm2  
6
Functional Diagram  
General Description  
Tꢀe hMC699LP5(E) iꢁ a frequencꢂ ꢁꢂntꢀeꢁiꢃer witꢀ  
a wideband reverꢁible polaritꢂ digital PFD and lock  
detect output. Tꢀe divider operateꢁ from 160 - 7000  
Mhꢃ witꢀ a continuouꢁ integer diviꢁion ratio N = 56  
to 519 and non-continuouꢁ diviꢁion ratio N = 16 to  
54. Tꢀe hMC699LP5(E) ꢀigꢀ frequencꢂ operation  
along witꢀ ultra low pꢀaꢁe noiꢁe floor make poꢁꢁible  
ꢁꢂntꢀeꢁiꢃerꢁ witꢀ wide loop bandwidtꢀ and low N  
reꢁulting in faꢁt ꢁettling and verꢂ low pꢀaꢁe noiꢁe.  
Wꢀen uꢁed in conjunction witꢀ a differential loop  
filter, tꢀe hMC699LP5(E) can be uꢁed to pꢀaꢁe  
lock a VCO to a reference oꢁcillator. For continuouꢁ  
diviꢁion ratio, tꢀe A counter and s counter muꢁt  
ꢁatiꢁfꢂ tꢀe condition: A + 1 s.  
Electrical Specifications, TA = +25° C, Vcc = Vcc1 = Vcc2 = Vcc3 = Vcc_pd = 5V  
Parameter  
Conditionꢁ  
Min.  
Tꢂp.  
Max.  
Unitꢁ  
Mhꢃ  
Mhꢃ  
dBm  
Mhꢃ  
Mhꢃ  
dBm  
Maximum Ref. Input Frequencꢂ  
Minimum Ref. Input Frequencꢂ  
Reference Input Power Range  
Maximum VCO Input Frequencꢂ  
Minimum VCO Input Frequencꢂ  
VCO Input Power Range  
sine or square Wave Input [1]  
square Wave Input [2]  
100 Mhꢃ Frequencꢂ  
1300  
10  
+5  
-5  
7000  
sine Wave Input  
160  
+5  
100 Mhꢃ Input Frequencꢂ  
-10  
PFD Output Voltage  
PFD Gain  
2000  
0.32  
mV, Pk - Pk  
V/Rad.  
Gain = Vpp / 2π Rad.  
@ 10 khꢃ Offꢁet @ 100 Mhꢃ square Wave Ref. Input  
Pin= 0 dBm  
ssB Pꢀaꢁe Noiꢁe  
-153  
345  
dBc/hꢃ  
mA  
Total supplꢂ Current  
[1] Maximum frequencieꢁ maꢂ be limited bꢂ available counter diviꢁion ratio.  
[2] square wave input acꢀieveꢁ beꢁt pꢀaꢁe noiꢁe at lower reference frequencꢂ (ꢁee ꢁine & ꢁquare wave compariꢁon plotꢁ)  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
For price, delivery, and to place orders: Analog Devices, Inc.,  
responsibilityisassumedby AnalogDevicesforits use, norforanyinfringementsofpatentsor other
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication orotherwiseunderany patent orpatent rights of AnalogDevices.
Phone: 781-329-4700 • Order online at www.analog.com  
6 - 1  
Application Support: Phone: 1-800-ANALOG-D  
Trademarks and registered trademarks are the property of their respective owners.  

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