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HI-1570CDIT PDF预览

HI-1570CDIT

更新时间: 2024-01-24 17:06:00
品牌 Logo 应用领域
HOLTIC 驱动接口集成电路驱动器
页数 文件大小 规格书
10页 100K
描述
Line Transceiver, 2 Func, 2 Driver, 2 Rcvr, CMOS, CDIP20, ROHS COMPLIANT, CERAMIC, SIDE BRAZED, DIP-20

HI-1570CDIT 技术参数

生命周期:Active包装说明:ROHS COMPLIANT, CERAMIC, SIDE BRAZED, DIP-20
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.72
差分输出:YES驱动器位数:2
输入特性:DIFFERENTIAL接口集成电路类型:LINE TRANSCEIVER
JESD-30 代码:R-CDIP-T20长度:25.4 mm
功能数量:2端子数量:20
最高工作温度:125 °C最低工作温度:-55 °C
封装主体材料:CERAMIC, METAL-SEALED COFIRED封装代码:DIP
封装形状:RECTANGULAR封装形式:IN-LINE
认证状态:Not Qualified最大接收延迟:450 ns
接收器位数:2座面最大高度:5.08 mm
最大供电电压:5.25 V最小供电电压:4.75 V
标称供电电压:5 V表面贴装:NO
技术:CMOS温度等级:MILITARY
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL最大传输延迟:150 ns
Base Number Matches:1

HI-1570CDIT 数据手册

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HI-1570  
PIN DESCRIPTIONS  
PIN  
SYMBOL  
FUNCTION  
DESCRIPTION  
1
2
VCONT A/B  
BUSA  
BUSA  
RXENA  
GNDA  
VDDA/B  
BUSB  
BUSB  
RXENB  
GNDB  
RXB  
analog Input  
analog output  
analog output  
digital input  
power supply  
power supply  
analog output  
analog output  
digital input  
power supply  
digital output  
digital output  
digital input  
digital input  
digital input  
digital output  
digital output  
digital input  
digital input  
digital input  
Transmit output amplitude control (0 - 5 Vdc, see Figure 4)  
MIL-STD-1533 bus driver A, positive signal  
MIL-STD-1553 bus driver A, negative signal  
Receiver A enable. If low, forces RXA and RXA low  
Ground for bus A  
3
4
5
6
+5 volt power for both bus A and bus B  
MIL-STD-1533 bus driver B, positive signal  
MIL-STD-1553 bus driver B, negative signal  
Receiver B enable. If low, forces RXB and RXB low  
Ground for bus B  
7
8
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
Receiver B output, inverted  
RXB  
Receiver B output, non-inverted  
TXINHB  
TXB  
Transmit inhibit, bus B. If high BUSB, BUSB disabled  
Transmitter B digital data input, non-inverted  
Transmitter B digital data input, inverted  
Receiver A output, inverted  
TXB  
RXA  
RXA  
Receiver A output, non-inverted  
TXINHA  
TXA  
Transmit inhibit, bus A. If high BUSA, BUSA disabled  
Transmitter A digital data input, non-inverted  
Transmitter A digital data input, inverted  
TXA  
FUNCTIONAL DESCRIPTION  
RECEIVER  
The HI-1570 data bus transceiver contains differential volt-  
age source drivers and differential receivers. They are in-  
tended for applications using a MIL-STD-1553 A/B data  
bus. The device produces a trapezoidal output waveform  
during transmission.  
The receiver accepts bi-phase differential data from the  
MIL-STD-1553 bus through the same direct or transformer  
coupled interface as the transmitter. The receiver’s differ-  
ential input stage drives a filter and threshold comparator  
that produces CMOS/TTL data at the RXA/B and RXA/B  
output pins.  
TRANSMITTER  
Data input to the device’s transmitter section is from the  
complementary CMOS / TTL inputs TXA/B and TXA/B.  
The transmitter accepts Manchester II bi-phase data and  
converts it to differential voltages on BUSA/B and BUSA/B.  
The transceiver outputs are either direct or transformer cou-  
pled to the MIL-STD-1553 data bus. Both coupling meth-  
ods produce a nominal voltage on the bus of 7.5 volts peak  
to peak at VCONT A&B = 5.0 Vdc. Refer to Figure 4 for  
transmitter output amplitudes at other values of VCONT  
A&B between 0 - 5 Vdc. (Contact your Holt Sales Repre-  
sentative about the 0 - 10 Vdc Control Voltage option).  
Each set of receiver outputs can be independently forced  
to a logic "0" by setting RXENA or RXENB low.  
MIL-STD-1553 BUS INTERFACE  
A direct coupled interface (see Figure 2) uses a 1:2.5 ratio  
isolation transformer and two 55 ohm isolation resistors  
between the transformer and the bus.  
In a transformer coupled interface (see Figure 3), the  
transceiver is connected to a 1:1.79 isolation transformer  
which in turn is connected to a 1:1.4 coupling transformer.  
The transformer coupled method also requires two  
coupling resistors equal to 75% of the bus characteristic  
impedance (Zo) between the coupling transformer and the  
bus.  
The transmitter is automatically inhibited and placed in the  
high impedance state when both TXA/B and TXA/B are ei-  
ther at a logic “1” or logic “0” simultaneously. A logic “1” ap-  
plied to the TXINHA/B input will force the transmitter to the  
high impedance state, regardless of the state of TXA/B and  
TXA/B.  
HOLT INTEGRATED CIRCUITS  
2

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