Nexperia
HEF4046B
Phase-locked loop
5.2. Pin description
Table 2. Pin description
Symbol
Pin
1
Description
PCP_OUT
PC1_OUT
COMP_IN
VCO_OUT
INH
phase comparator pulse output
phase comparator 1 output
comparator input
2
3
4
VCO output
5
inhibit input
C1A
6
capacitor C1 connection A
capacitor C1 connection B
ground supply voltage
VCO input
C1B
7
VSS
8
VCO_IN
SF_OUT
R1
9
10
11
12
13
14
15
16
source-follower output
resistor R1 connection
resistor R2 connection
phase comparator 2 output
signal input
R2
PC2_OUT
SIG_IN
ZENER
VDD
Zener diode input for regulated supply
supply voltage
6. Functional description
6.1. VCO control
The VCO requires an external capacitor (C1) and resistor (R1) with an optional resistor (R2).
Resistor R1 and capacitor C1 determine the frequency range of the VCO, while resistor R2 enables
the VCO to have a frequency off-set if required. The high input impedance of the VCO simplifies
the design of low-pass filters; it permits the designer a wide choice of resistor/capacitor ranges. In
order not to load the low-pass filter, a source-follower output of the VCO input voltage is provided
at SF_OUT (pin 10). If this is used, a load resistor (RL) should be connected from SF_OUT to VSS
if unused, SF_OUT should be left open. The VCO output (pin 4) can either be connected directly
to the comparator input COMP_IN (pin 3) or via a frequency divider. A LOW-level at the inhibit
;
input INH_IN (pin 5) enables the VCO and the source follower, while a HIGH-level turns both off to
minimize standby power consumption.
6.2. Phase comparators
The phase-comparator signal input SIG_IN (pin 14) can be direct-coupled, provided the signal
swing is between the standard HE4000B family input logic levels. The signal must be capacitively
coupled to the self-biasing amplifier at the signal input with smaller swings. Phase comparator 1 is
an EXCLUSIVE-OR network. The signal and comparator input frequencies must have a 50% duty
factor to obtain the maximum lock range. The average output voltage of the phase comparator is
equal to 0.5VDD when there is no signal or noise at the signal input. The average voltage to the
VCO input VCO_IN is supplied by the low-pass filter connected to the output of phase comparator
1. This also causes the VCO to oscillate at the center frequency (f0). The frequency capture range
(2fC) is defined as the frequency range of input signals on which the PLL will lock if it was initially
out of lock. The frequency lock range (2fL) is defined as the frequency range of input signals on
which the loop will stay locked if it was initially in lock. The capture range is smaller or equal to the
lock range.
©
HEF4046B
All information provided in this document is subject to legal disclaimers.
Nexperia B.V. 2022. All rights reserved
Product data sheet
Rev. 7 — 6 January 2022
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