5秒后页面跳转
HD74LS373FPEL-E PDF预览

HD74LS373FPEL-E

更新时间: 2024-02-05 11:52:45
品牌 Logo 应用领域
瑞萨 - RENESAS 锁存器逻辑集成电路
页数 文件大小 规格书
8页 97K
描述
IC,LATCH,SINGLE,8-BIT,LS-TTL,SOP,20PIN,PLASTIC

HD74LS373FPEL-E 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SOIC
包装说明:7.5 X 12.8 MM, 1.27 PITCH, PLASTIC, SOP-20针数:20
Reach Compliance Code:compliant风险等级:5.17
Is Samacsys:N系列:LS
JESD-30 代码:R-PDSO-G20长度:12.8 mm
负载电容(CL):45 pF逻辑集成电路类型:BUS DRIVER
最大I(ol):0.024 A湿度敏感等级:1
位数:8功能数量:1
端口数量:2端子数量:20
最高工作温度:75 °C最低工作温度:-20 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP20,.4封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TAPE AND REEL
峰值回流温度(摄氏度):260电源:5 V
最大电源电流(ICC):40 mAProp。Delay @ Nom-Sup:18 ns
传播延迟(tpd):30 ns认证状态:Not Qualified
座面最大高度:2.65 mm子类别:FF/Latches
最大供电电压 (Vsup):5.25 V最小供电电压 (Vsup):4.75 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:TTL温度等级:COMMERCIAL EXTENDED
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7.5 mmBase Number Matches:1

HD74LS373FPEL-E 数据手册

 浏览型号HD74LS373FPEL-E的Datasheet PDF文件第2页浏览型号HD74LS373FPEL-E的Datasheet PDF文件第3页浏览型号HD74LS373FPEL-E的Datasheet PDF文件第4页浏览型号HD74LS373FPEL-E的Datasheet PDF文件第5页浏览型号HD74LS373FPEL-E的Datasheet PDF文件第6页浏览型号HD74LS373FPEL-E的Datasheet PDF文件第7页 
HD74LS373  
Octal D-type Transparent Latches (with three-state outputs)  
REJ03D0482–0200  
Rev.2.00  
Feb.18.2005  
The HD74LS373, 8-bit register features totem-pole three-state outputs designed specifically for driving highly-  
capacitive or relatively low-impedance loads. The high-impedance third state and increased high-logic-level drive  
provide this register with the capacity of being connected directly to and driving the bus lines in a bus-organized system  
without need for interface or pull-up components. They are particularly attractive for implementing buffer registers, I/O  
ports, bidirectional bus drivers, and working registers.  
The eight latches are transparent D-type latches meaning that while the enable (G) is high the Q outputs will follow the  
data (D) inputs. When the enable is taken low the output will be latched at the level of the data that was setup.  
Features  
Ordering Information  
Package Code  
(Previous Code)  
Package  
Abbreviation  
Taping Abbreviation  
(Quantity)  
Part Name  
Package Type  
PRDP0020AC-B  
(DP-20NEV)  
HD74LS373P  
DILP-20 pin  
P
PRSP0020DD-B  
(FP-20DAV)  
HD74LS373FPEL  
HD74LS373RPEL  
SOP-20 pin (JEITA)  
SOP-20 pin (JEDEC)  
FP  
RP  
EL (2,000 pcs/reel)  
EL (1,000 pcs/reel)  
PRSP0020DC-A  
(FP-20DBV)  
Note: Please consult the sales office for the above package availability.  
Pin Arrangement  
Output  
1
Control  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
VCC  
2
3
1Q  
1D  
Q
D
Q
D
8Q  
OE  
OE  
G
G
8D  
4
2D  
7D  
D
Q
D
Q
G
OE  
G
OE  
5
2Q  
7Q  
6
3Q  
6Q  
Q
D
Q
D
OE  
OE  
G
G
7
3D  
6D  
8
4D  
5D  
D
Q
D
Q
G
OE  
G
OE  
9
4Q  
5Q  
10  
GND  
Enable G  
(Top view)  
Rev.2.00, Feb.18.2005, page 1 of 7  

与HD74LS373FPEL-E相关器件

型号 品牌 获取价格 描述 数据表
HD74LS373P HITACHI

获取价格

Octal D-type Transparent Latches(with three-state outputs)
HD74LS373P RENESAS

获取价格

Octal D-type Transparent Latches (with three-state outputs)
HD74LS373P(DIP) HITACHI

获取价格

Octal D-type Transparent Latches(with three-state outputs)
HD74LS373P-E RENESAS

获取价格

LS SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDIP20, DP-20N
HD74LS373RP HITACHI

获取价格

Bus Driver, LS Series, 1-Func, 8-Bit, True Output, TTL, PDSO20, FP-20DB
HD74LS373RP RENESAS

获取价格

暂无描述
HD74LS373RP-E RENESAS

获取价格

LS SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20, FP-20DB
HD74LS373RPEL RENESAS

获取价格

Octal D-type Transparent Latches (with three-state outputs)
HD74LS373RPEL-E RENESAS

获取价格

暂无描述
HD74LS374 RENESAS

获取价格

Octal D-type Edge-triggered Flip-Flops (with three-state outputs)