LSI
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Overview
The H8/534, H8/536 and H8/537 are CMOS microcomputer units (MCUs) comprising a CPU core
plus a full range of supporting functions $BQa (Jn entire system integrated onto a single chip.
The CPU features a highly orthogonal instruction set that permits addressing modes and data sizes to
be specified independently in each instruction. An internal 16-bit architecture and 16-bit access to on-
chip memory enhance the CPU's data-processing capability and provide the speed needed for realtime
control applications.
The on-chip supporting functions include RAM, ROM, timers, a serial communication interface
(SCI), A/D conversion, and I/O ports. An on-chip data transfer controller (DTC) can transfer data in
either direction between memory and I/O independently of the CPU.
For the on-chip ROM, a choice is offered between masked ROM and programmable ROM (PROM).
The PROM version can be programmed by the user with a general-purpose PROM writer.
Function Overview
Features
Description
General-register architecture
· Eight 16-bit general registers
· Five 8-bit and two 16-bit control registers
High speed
· Maximum clock rates
5-V
version
16 MHz (oscillator
frequency: 32 MHz)
S- and A-mask
products
3-V
version
10 MHz (oscillator
frequency: 20 MHz)
H8/534,
H8/536
2.7-V
8 MHz (oscillator
version
frequency: 16 MHz)
5-V
version
16 MHz (oscillator
frequency: 16 MHz)
U-mask products
5-V
version
16 MHz (oscillator
frequency: 16 MHz)
CPU
3-V
version
10 MHz (oscillator
frequency: 10 MHz)
H8/537
2.7-V
version
8 MHz (oscillator
frequency: 8 MHz)
Two CPU operating modes
·Minimum mode: Supports an address space of up to 64 kbytes
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5/30/01