1PrePreliminaryeee
H27U518S2C Series
512 Mbit (64 M x 8 bit) NAND Flash
FEATURES SUMMARY
HIGH DENSITY NAND FLASH MEMORIES
- Cost effective solutions for mass storage applications
ELECTRONIC SIGNATURE
- 1st cycle : Manufacturer Code
- 2nd cycle : Device Code
NAND INTERFACE
- x8 bus width
- Address/ Data Multiplexing
- Pinout compatiblity for all densities
CHIP ENABLE DON’T CARE
- Simple interface with microcontroller
SUPPLY VOLTAGE
HARDWARE DATA PROTECTION
- 3.3 V device : Vcc = 2.7 V ~ 3.6 V
- Program/Erase locked during Power transitions.
MEMORY CELL ARRAY
DATA RETENTION
- (512 + 16) bytes x 32 pages x 4096 blocks
- 100,000 Program/Erase cycles (with 1bit/528byte ECC)
- 10 years Data Retention
PAGE SIZE
- (512 + 16 spare) Bytes
PACKAGE
- H27U518S2CTR-Bx
BLOCK SIZE
- (16 K + 512 spare) Bytes
: 48-Pin TSOP1 (12 × 20 × 1.2 mm)
- H27U518S2CTR-Bx (Lead & Halogen Free)
PAGE READ / PROGRAM
- Random access : 12 us (max.)
- Sequential access : 30 ns (min.)
- Page program time : 200 us (typ.)
COPY BACK PROGRAM
- Automatic block download without latency time
FAST BLOCK ERASE
- Block erase time : 1.5 ms (typ.)
STATUS REGISTER
- Normal Status Register (Read/Program/Erase)
- Extended Status Register (EDC)
Rev 1.0 / Dec. 2008
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