Datasheet > GS8182T19BGD-300

GS8182T19BGD-300

更新时间： 2023-12-06 20:13:31

品牌	Logo	应用领域
GSI		/
页数	文件大小	规格书
27页	1119K
描述
165 BGA

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数据手册

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GS8182T19BGD-300 数据手册

GS8182T19/37BD-435/400/375/333/300

Pin Description Table

Symbol

Description

Synchronous Address Inputs

Synchronous Read/ Write

Synchronous Byte Writes

Synchronous Load Pin

Input Clock

Type

Input

Comments

—

R/W

BW0–BW3

Input

Read Active when High

Input

Active Low

Input

Active Low

Input

Active High

Input Clock

Input

Active Low

TMS

TDI

Test Mode Select

Input

—

Test Data Input

Input

—

TCK

TDO

V_REF

Test Clock Input

Input

—

Test Data Output

Output

Input

—

HSTL Input Reference Voltage

Output Impedance Matching Input

Must Connect Low

Data I/O

—

MCL

Input

—

Input/Output

Input

Three State

Active Low

—

Disable DLL when low

Output Echo Clock

Power Supply

Doff

Output

Supply

—

V_DD

1.8 V Nominal

V_DDQ

V_SS

Isolated Output Buffer Supply

Supply

1.5 V or 1.8 V Nominal

Power Supply: Ground

Q Valid Output

Supply

Output

—

QVLD

No Connect

Notes:

1. NC = Not Connected to die or any other pin

2. When ZQ pin is directly connected to V , output impedance is set to minimum value and it cannot be connected to ground or left

DDQ

unconnected.

3. K, K cannot be set to V

voltage

REF

Rev: 1.03a 11/2011

4/27

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

1 2 345 6 7...27

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