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GS81302S18E-250 PDF预览

GS81302S18E-250

更新时间: 2023-11-02 19:29:12
品牌 Logo 应用领域
GSI /
页数 文件大小 规格书
35页 1322K
描述
165 BGA

GS81302S18E-250 数据手册

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GS81302S08/09/18/36E-375/350/333/300/250  
Pin Description Table  
Symbol  
SA  
Description  
Type  
Input  
Input  
Comments  
Synchronous Address Inputs  
Read/Write Contol Pin  
R/W  
Write Active Low; Read Active High  
Active Low  
x08 Version  
NW0–NW1  
BW0–BW1  
BW0–BW3  
Synchronous Nybble Writes  
Synchronous Byte Writes  
Synchronous Byte Writes  
Input  
Input  
Input  
Active Low  
x18 Version  
Active Low  
x36 Version  
K
Input Clock  
Output Clock  
Input  
Input  
Input  
Input  
Input  
Output  
Input  
Input  
Input  
Output  
Active High  
C
Active High  
TMS  
TDI  
TCK  
TDO  
VREF  
Test Mode Select  
Test Data Input  
Test Clock Input  
Test Data Output  
HSTL Input Reference Voltage  
Output Impedance Matching Input  
Input Clock  
ZQ  
K
Active Low  
Active Low  
Active Low  
Active Low  
Active Low  
Active High  
C
Output Clock  
DOFF  
DLL Disable  
LD  
CQ  
CQ  
Dn  
Synchronous Load Pin  
Output Echo Clock  
Output Echo Clock  
Synchronous Data Inputs  
Synchronous Data Outputs  
Power Supply  
Output  
Output  
Input  
Output  
Supply  
Qn  
VDD  
1.8 V Nominal  
VDDQ  
VSS  
NC  
Isolated Output Buffer Supply  
Power Supply: Ground  
No Connect  
Supply  
Supply  
1.8 or 1.5 V Nominal  
Notes:  
1. C, C, K, or K cannot be set to V  
voltage.  
REF  
2. When ZQ pin is directly connected to V , output impedance is set to minimum value and it cannot be connected to ground or left  
DDQ  
unconnected.  
3. NC = Not Connected to die or any other pin  
Rev: 1.03b 12/2011  
6/35  
© 2011, GSI Technology  
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.  

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