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GS72108AGP-7 PDF预览

GS72108AGP-7

更新时间: 2024-09-29 07:02:07
品牌 Logo 应用领域
其他 - ETC 静态存储器
页数 文件大小 规格书
12页 318K
描述
256K x 8 2Mb Asynchronous SRAM

GS72108AGP-7 数据手册

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GS72108ATP/J  
7, 8, 10, 12 ns  
SOJ, TSOP  
Commercial Temp  
Industrial Temp  
256K x 8  
2Mb Asynchronous SRAM  
3.3 V V  
DD  
Center V and V  
DD  
SS  
Features  
SOJ 256K x 8-Pin Configuration  
• Fast access time: 7, 8, 10, 12 ns  
• CMOS low power operation: 135/115/95/80 mA at minimum  
cycle time  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
1
A4  
NC  
A5  
2
A3  
3
A2  
A6  
• Single 3.3 V power supply  
4
• All inputs and outputs are TTL-compatible  
• Fully static operation  
A1  
A7  
5
A0  
A8  
• Industrial Temperature Option: –40° to 85°C  
• Package line up  
6
CE  
OE  
DQ8  
DQ7  
VSS  
VDD  
DQ6  
DQ5  
A9  
7
DQ1  
DQ2  
VDD  
VSS  
DQ3  
DQ4  
WE  
A17  
A16  
A15  
A14  
A13  
J: 400 mil, 36-pin SOJ package  
8
36-pin  
TP: 400 mil, 44-pin TSOP Type II package  
GP:Pb-free 400 mil, 44-pin TSOP Type II package  
• Pb-Free TSOP-II package available  
9
400 mil SOJ  
10  
11  
12  
13  
14  
15  
16  
17  
18  
Description  
The GS72108A is a high speed CMOS Static RAM organized  
as 262,144 words by 8 bits. Static design eliminates the need  
for external clocks or timing strobes. The GS operates on a  
single 3.3 V power supply and all inputs and outputs are TTL-  
compatible. The GS72108A is available in 400 mil SOJ and  
400 mil TSOP Type-II packages.  
A10  
A11  
A12  
NC  
NC  
Package J  
Pin Descriptions  
Symbol  
A0A17  
DQ1DQ8  
CE  
Description  
Address input  
Data input/output  
Chip enable input  
Write enable input  
Output enable input  
+3.3 V power supply  
WE  
OE  
V
DD  
V
Ground  
SS  
NC  
No connect  
Rev: 1.05 10/2004  
1/12  
© 2001, GSI Technology  
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.  

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