Datasheet > GM71S4400CJ-80

GM71S4400CJ-80

更新时间： 2022-11-26 04:00:50

品牌	Logo	应用领域
乐金电子 - LG		/
页数	文件大小	规格书
9页	107K
描述
1,048,576 WORDS x 4BIT CMOS DYNAMIC RAM

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数据手册

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GM71S4400CJ-80 数据手册

GM71C(S)4400C/CL

LG Semicon

Capacitance (VCC = 5V+/-10%, TA = 25C)

Symbol

CI1

Parameter

Min

Max

Unit

§Ü

Note

Input Capacitance (Address)

§Ü

CI2

Input Capacitance (Clocks)

§Ü

CI/O

Data Input, Output Capacitance (Data-In, Out)

1, 2

Note: 1. Capacitance measured with Boonton Meter or effective capacitance measuring method.

2. CAS = VIH to disable DOUT

AC Characteristics (VCC = 5V+/-10%, TA = 0 ~ 70C, Notes 1, 14, 15, 16)

Test Conditions

§Ü

)

Input rise and fall times: 5ns

Output load : 2 TTL gate + C

(100

Input, output timing reference levels: 0.8V, 2.4V

(Including scope and jig)

Read, Write, Read-Modify-Write and Refresh Cycles (Common Parameters)

GM71C(S)4400 GM71C(S)4400 GM71C(S)4400

C/CL-60

C/CL-70

C/CL-80

Unit Note

Symbol

Parameter

Min Max Min Max Min Max

Random Read or Write Cycle Time

RAS Precharge Time

110

130

150

RAS

CAS

ASR

RAH

ASC

CAH

RCD

RAD

RSH

CSH

CRP

ODD

DZO

DZC

RAS Pulse Width

60 10,000

15 10,000

70 10,000

20 10,000

80 10,000

20 10,000

CAS Pulse Width

Row Address Set-up Time

Row Address Hold Time

Column Address Set-up Time

Column Address Hold Time

RAS to CAS Delay Time

RAS to Column Address Delay Time

RAS Hold Time

20 45

15 30

20 50

15 35

20 60

15 40

CAS Hold Time

CAS to RAS Precharge Time

OE to DIN Delay Time

OE Delay Time from DIN

CAS Set-up Time from DIN

Transition Time

(Rise and Fall)

Refresh Period

REF

Refresh Period (L-version)

128

1 2 345 6 7...9

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