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G12242-0707W_15 PDF预览

G12242-0707W_15

更新时间: 2024-01-18 07:01:18
品牌 Logo 应用领域
HAMAMATSU /
页数 文件大小 规格书
10页 274K
描述
Near infrared area image sensor with 128 x128 pixels

G12242-0707W_15 数据手册

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InGaAs area image sensor  
G12242-0707W  
Near infrared area image sensor with  
128 × 128 pixels  
The G12242-0707W has a hybrid structure consisting of a CMOS readout circuit (ROIC: readout integrated circuit) and  
back-illuminated InGaAs photodiodes. Each pixel is made up of an InGaAs photodiode and a ROIC electrically connected by  
indium bumps. The timing generator in the ROIC provides an analog video output and AD-TRIG output which are obtained  
by just supplying a master clock (MCLK) and master start pulse (MSP) as digital inputs from external sources.  
The G12242-0707W has 128 × 128 pixels arrayed at a 20 μm pitch and their signals are read out from a video line. Light  
incident on the InGaAs photodiodes is converted into electrical signals which are then input to the ROIC through indium  
pumps. Electrical signals in the ROIC are converted into voltage signals by charge ampliers and then sequentially output  
from the video line by the shift register. The G12242-0707W is hermetically sealed in a TO-8 package together with a two-  
stage thermoelectric cooler to deliver low-cost yet highly stable operation.  
Features  
Applications  
Spectral response range: 0.95 to 1.7 μm  
Thermal image monitor  
Laser beam proler  
-
High sensitivity: 1 μV/e  
Frame rate: 258 fps max.  
Near infrared image detection  
Foreign object detection  
Global shutter mode and rolling shutter mode switchable  
Simple operation (built-in timing generator)  
Two-stage TE-cooled  
Low cost  
Block diagram  
The G12242-0707W operates in either global shutter mode or rolling shut-  
ter mode which are switchable. The operation of the readout circuit in each  
mode is described below.  
Start  
Rolling shutter mode  
The sample-and-hold switches in all pixels are always ON. Pixel scanning  
starts from the top left point as shown in the figure on the right.  
The vertical shift register scans from top to bottom while sequentially se-  
lecting each row. The following operations  to ‘ are performed on each  
pixel of the selected row.  
128 × 128 pixels  
 Transfers the integrated optical signal information to the signal processing  
circuit as a signal voltage, and samples and holds the signal voltage.  

Resets each pixel after having transferred the signal, transfers the reset  
signal voltage to the signal processing circuit, and samples and holds the  
reset signal voltage.  
End  
‘
The horizontal shift register performs a sequential scan to output the  
signal voltage and reset signal voltage as serial data. The offset voltage  
in each pixel can be eliminated by nding a difference between the signal  
voltage and the reset signal voltage with a circuit outside the sensor.  
Signal processing circuit  
Horizontal shift register  
VIDEO  
(signal voltage)  
After the above operations  to ‘ are complete, the reset switch for each  
pixel on the selected row turns off and signal integration begins. At the  
same time, the vertical shift register shifts by one row to select the next  
row and the operations  to ‘ are repeated.  
VIDEO  
(reset voltage)  
KMIRC0068EA  
After the vertical shift register advances to the 128th row, the master start  
pulse (MSP), which is a frame scan signal, changes from low (0 V) to high  
(5 V), and the next frame scan begins when the MCLK goes low. The signal  
integration time is the time period from right after the end of the n-th row  
scan to the timing for holding the optical signal information integrated on  
the n-th row in the next frame.  
1
www.hamamatsu.com  

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