External Components
VDD
C 5
4 x 1Mbit
DRAM
A0 – A9
V
WE
SS
VDD
C A S
CAS
RAS
R A S 2
§
§
1
2
3
4
R 1
28
27
R A S 1
D
Q
Q
Q
Q
W E
A9
26
XTAL
R A S 3
R A S 4
A8
A0 – A9
WE
§ 25
See INSET
XTAL/CLOCK
§
24
CAS
5
6
IRQ
RAS
23
22
21
20
D
SERIAL CLOCK
A7
7
8
COMMAND DATA
C S
A6
FX802J
A0 – A9
WE
A5
9
REPLY DATA
VBIAS
A4
CAS
RAS
D
10
19
18
17
16
15
A3/ECK
A2/DCK
A1/DEI
A0/ENO
11
12
AUDIO OUT
AUDIO IN
13
14
A0 – A9
WE
C6
C 4
VSS
CAS
RAS
D
C 1
R3
VSS
INSET
Component
Value
XTAL
R1
R2
R3
C1
C2
C3
=
22.0kΩ
1.0MΩ
1.0kΩ
1.0µF
33.0pF
33.0pF
4 §
C4
C5
C6
X1
=
1.0µF
1.0µF
1.0nF
R2
X1
FX802J
4.00MHz
or
or
4.032MHz
4.096MHz
5
XTAL/CLOCK
VSS
C 3
C 2
Tolerance: R = ±10% C = ±20%
Fig.2 Recommended Component and DRAM Connections
Notes
1. Xtal circuitry shown INSET is in accordance with CML
Application Note D/XT/2 December 1991.
6. Recommended DRAM Parameters:
256kbit x 1 or 1Mbit x 1 Dynamic Random Access Memory
with ‘CAS before RAS’ refresh mode, maximum Row
Address Access time = 200nsec.
2. External Xtal circuitry is not applicable to the 24-pin/lead
versions of this device, only a clock pulse input can be
used.
Example DRAM types:
256kbit (262,144bits)
Texas Instruments
Hitachi
1Mbit (1,048,576bits)
Texas Instruments
Hitachi
TMS4256–20
HM51256–15
3. Functions whose pins are marked § above are not
available on the 24-pin/lead versions of this device. Pin
numbers illustrated are for 28-pin versions.
TMX4C1024–15
HM511000–15
4. Table 3 details the actual encoder/decoder sample rates
available using the Xtal frequencies recommended above.
7. Figure 2 (above) shows connections to 4 x 1Mbit sections
of DRAM. If desired, to simplify PCB layout, the DRAM
inputs A0 to A8 may be connected in any order to the
FX802 DVSR Codec output pins A0 to A8. Connections to
256kbit DRAM are similar, but A9 unconnected.
5. R1 is used as the DBS 800 system common-pullup for the
“C-BUS” Interrupt Request (IRQ) line, the optimum value
will depend upon the circuitry connected to the IRQ line.
Up to 8 peripherals may be connected to this line.
8. When using the FX802 “stand-alone (Direct Access),” no
DRAM should be connected.
4