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FOD063LTV PDF预览

FOD063LTV

更新时间: 2024-02-25 09:21:01
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 输出元件光电
页数 文件大小 规格书
14页 413K
描述
Logic IC Output Optocoupler, 2-Element, 3750V Isolation, 10MBps, DIP-8

FOD063LTV 技术参数

生命周期:Obsolete包装说明:DIP-8
Reach Compliance Code:unknownHTS代码:8541.40.80.00
风险等级:5.83配置:SEPARATE, 2 CHANNELS
标称数据速率:10 MBps最大正向电流:0.05 A
最大绝缘电压:3750 V元件数量:2
最大通态电流:0.05 A最高工作温度:85 °C
最低工作温度:-40 °C光电设备类型:LOGIC IC OUTPUT OPTOCOUPLER
最小供电电压:2.7 VBase Number Matches:1

FOD063LTV 数据手册

 浏览型号FOD063LTV的Datasheet PDF文件第2页浏览型号FOD063LTV的Datasheet PDF文件第3页浏览型号FOD063LTV的Datasheet PDF文件第4页浏览型号FOD063LTV的Datasheet PDF文件第5页浏览型号FOD063LTV的Datasheet PDF文件第6页浏览型号FOD063LTV的Datasheet PDF文件第7页 
May 2010  
FOD060L, FOD260L, FOD063L  
LVTTL/LVCMOS 3.3V High Speed-10 MBit/s  
Logic Gate Optocouplers  
Single Channel: FOD060L, FOD260L  
Dual Channel: FOD063L  
Data multiplexing  
Features  
Switching power supplies  
Compact SO8 package (except FOD260L – 8-pin DIP)  
Pulse transformer replacement  
Very high speed – 10 MBit/s  
Computer-peripheral interface  
Superior CMR — 50 kV/µs at 2,000V peak  
Fan-out of 8 over -40°C to +85°C  
Description  
Logic gate output  
These optocouplers consist of an AlGaAS LED, optically cou-  
pled to a very high speed integrated photo-detector logic gate.  
Single channel devices include a strobable output. This output  
features an open collector, thereby permitting wired OR outputs.  
The output consists of bipolar transistors in a Bi-CMOS process  
for reduced power consumption. The coupled parameters are  
guaranteed over the temperature range of -40°C to +85°C. A  
maximum input signal of 5 mA (3 mA for the FODX6XL ver-  
sions) will provide a minimum output sink current of 13 mA (fan  
out of 8). An internal noise shield provides superior common  
mode rejection of typically 50 kV/µs at 2,000V common mode.  
Strobable output (single channel devices)  
Wired OR-open collector  
U.L. recognized (File # E90700) (pending)  
UDE approval pending  
Applications  
Ground loop elimination  
LSTTL to TTL, LSTTL or 5-volt CMOS  
Line receiver, data transmission  
Package  
VCC  
N/C  
+
1
8
VCC  
+
1
8
8
VF1  
_
1
VE  
2
3
4
7
6
5
V01  
2
3
4
7
6
5
VF  
_
_
VO  
V02  
VF2  
+
8
N/C  
GND  
8
GND  
1
1
Single-channel circuit drawing Dual-channel circuit drawing  
(FOD060L, FOD260L) (FOD063L)  
Truth Table (Positive Logic)  
Input  
Enable  
Output  
H
H
L
L
H
H
H
L
H
L
L
H
H*  
L*  
NC*  
NC*  
L*  
H*  
*Dual channel devices or single channel devices with pin 7 not connected.  
A 0.1 µF bypass capacitor must be connected between pins 8 and 5. (See note 1)  
©2008 Fairchild Semiconductor Corporation  
FOD060L, FOD260L, FOD063L Rev. 1.0.3  
www.fairchildsemi.com  

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