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FM93C46ALZVMT8X PDF预览

FM93C46ALZVMT8X

更新时间: 2024-01-16 00:23:05
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟光电二极管内存集成电路
页数 文件大小 规格书
13页 120K
描述
EEPROM, 64X16, Serial, CMOS, PDSO8, PLASTIC, TSSOP-8

FM93C46ALZVMT8X 技术参数

生命周期:Obsolete零件包装代码:SOIC
包装说明:TSSOP,针数:8
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.32.00.51风险等级:5.38
其他特性:DATA RETENTION = 40 YEARS备用内存宽度:8
最大时钟频率 (fCLK):0.25 MHz数据保留时间-最小值:40
JESD-30 代码:R-PDSO-G8长度:4.4 mm
内存密度:1024 bit内存集成电路类型:EEPROM
内存宽度:16功能数量:1
端子数量:8字数:64 words
字数代码:64工作模式:SYNCHRONOUS
最高工作温度:125 °C最低工作温度:-40 °C
组织:64X16封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH并行/串行:SERIAL
认证状态:Not Qualified座面最大高度:1.2 mm
串行总线类型:MICROWIRE最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):2.7 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:AUTOMOTIVE端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
宽度:3 mm最长写入周期时间 (tWC):15 ms
Base Number Matches:1

FM93C46ALZVMT8X 数据手册

 浏览型号FM93C46ALZVMT8X的Datasheet PDF文件第2页浏览型号FM93C46ALZVMT8X的Datasheet PDF文件第3页浏览型号FM93C46ALZVMT8X的Datasheet PDF文件第4页浏览型号FM93C46ALZVMT8X的Datasheet PDF文件第6页浏览型号FM93C46ALZVMT8X的Datasheet PDF文件第7页浏览型号FM93C46ALZVMT8X的Datasheet PDF文件第8页 
Refer Table 1 and Table 2 for more details. This pin is internally  
pulled-up to VCC. Hence leaving this pin unconnected would  
default to 16-bit data format.  
Pin Description  
Chip Select (CS)  
ThisisanactivehighinputpintoFM93C46AEEPROM(thedevice)  
and is generated by a master that is controlling the device. A high  
level on this pin selects the device and a low level deselects the  
device. All serial communications with the device is enabled only  
when this pin is held high. However this pin cannot be permanently  
tied high, as a rising edge on this signal is required to reset the  
internal state-machine to accept a new cycle and a falling edge to  
initiateaninternalprogrammingafterawritecycle.Allactivityonthe  
SK, DI and DO pins are ignored while CS is held low.  
Microwire Interface  
AtypicalcommunicationontheMicrowirebusismadethroughthe  
CS, SK, DI and DO signals. To facilitate various operations on the  
Memory array, a set of 7 instructions are implemented on  
FM93C46A. The format of each instruction is listed under Table 1  
(for 16-bit format) and Table 2 (for 8-bit format).  
Instruction  
Each of the above 7 instructions is explained under individual  
instruction descriptions.  
Serial Clock (SK)  
Thisisaninputpintothedeviceandisgeneratedbythemasterthat  
is controlling the device. This is a clock signal that synchronizes the  
communicationbetweenamasterandthedevice. Allinputinforma-  
tion(DI)tothedeviceislatchedontherisingedgeofthisclockinput,  
whileoutputdata(DO)fromthedeviceisdrivenfromtherisingedge  
of this clock input. This pin is gated by CS signal.  
Start bit  
This is a 1-bit field and is the first bit that is clocked into the device  
whenaMicrowirecyclestarts.Thisbithastobe1foravalidcycle  
to begin. Any number of preceding 0can be clocked into the  
device before clocking a 1.  
Serial Input (DI)  
Opcode  
This is an input pin to the device and is generated by the master  
that is controlling the device. The master transfers Input informa-  
tion (Start bit, Opcode bits, Array addresses and Data) serially via  
this pin into the device. This Input information is latched on the  
rising edge of the SCK. This pin is gated by CS signal.  
This is a 2-bit field and should immediately follow the start bit.  
These two bits (along with 2 MSB of address field) select a  
particular instruction to be executed.  
Address Field  
Serial Output (DO)  
Depending on the selected organization, this is a 6-bit or 7-bit field  
and should immediately follow the Opcode bits. In FM93C46A, all  
6 bits (or 7 bits) are used for address decoding during READ,  
WRITE and ERASE instructions. During all other instructions, the  
MSB 2 bits are used to decode instruction (along with Opcode bits).  
This is an output pin from the device and is used to transfer Output  
data via this pin to the controlling master. Output data is serially  
shifted out on this pin from the rising edge of the SCK. This pin is  
active only when the device is selected.  
Data Field  
Organization (ORG)  
Depending on the selected organization, this is a 16-bit or 8-bit  
field and should immediately follow the Address bits. Only the  
WRITE and WRALL instructions require this field. MSB bit (D15 or  
D7) is clocked first and LSB bit (D0) is clocked last (both during  
writes as well as reads).  
This is an input pin to the device and is used to select the format  
of data (16-bit or 8-bit). If this pin is tied high, 16-bit format is  
selected, while if it is tied low, 8-bit format is selected. Depending  
ontheformatselected,FM93C46Arequires6-bitaddressfield(for  
16-bit data format) or 7-bit address field (for 8-bit data format).  
Table 1. Instruction set (16-bit organization)  
Instruction  
READ  
Start Bit  
Opcode Field  
Address Field  
Data Field  
1
1
1
1
1
1
1
10  
00  
01  
00  
00  
11  
00  
A5 A4 A3 A2 A1 A0  
WEN  
1
1
X
X
X
X
WRITE  
WRALL  
WDS  
A5 A4 A3 A2 A1 A0  
D15-D0  
D15-D0  
0
0
1
0
X
X
X
X
X
X
X
X
ERASE  
ERAL  
A5 A4 A3 A2 A1 A0  
1
0
X
X
X
X
5
www.fairchildsemi.com  
FM93C46A Rev. C.1  

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