DATA SHEET
www.onsemi.com
MOSFET – N-Channel,
POWERTRENCH), SyncFETt
V
R
MAX
I MAX
D
DS
DS(on)
30 V
4.3 mW @ 10 V
5.2 mW @ 4.5 V
22 A
30 V, 22 A, 4.3 mW
Pin 1
S
S
FDMS0310AS
General Description
S
G
The FDMS0310AS has been designed to minimize losses in power
conversion application. Advancements in both silicon and package
D
D
D
D
technologies have been combined to offer the lowest R
while
DS(on)
Top
Bottom
maintaining excellent switching performance. This device has
the added benefit of an efficient monolithic Schottky body diode.
PQFN8 5 y 6, 1.27P
(Power 56)
CASE 483AE
Features
• Max R
• Max R
= 4.3 mW at V = 10 V, I = 19 A
GS D
DS(on)
= 5.2 mW at V = 4.5 V, I = 17 A
DS(on)
GS
D
ELECTRICAL CONNECTION
• Advanced Package and Silicon Combination for Low R
and High Efficiency
DS(on)
D
D
D
D
5
6
7
8
4
3
2
1
G
S
S
S
• SyncFET Schottky Body Diode
• MSL1 Robust Package Design
• 100% UIL Tested
• Pb−Free, Halide Free and RoHS Compliant
Applications
• Synchronous Rectifier for DC/DC Converters
• Notebook Vcore/GPU Low Side Switch
• Networking Point of Load Low Side Switch
• Telecom Secondary Side Rectification
N-CHANNEL MOSFET
MARKING DIAGRAM
MAXIMUM RATINGS (T = 25°C unless otherwise noted)
A
&Z&3&K
FDMS
0310AS
Symbol
Parameter
Drain to Source Voltage
Value
Unit
V
V
DS
V
GS
30
20
Gate to Source Voltage (Note 4)
Drain Current:
− Continuous (Package limited)
− Continuous (Silicon limited)
− Continuous T = 25°C (Note 1a)
V
I
D
A
T
C
= 25°C
22
80
19
100
C
&Z
&3
= Assembly Plant Code
= 3−Digit Date Code
(Year and Week)
T
= 25°C
A
− Pulsed
&K
= 2−Digit Lot Run Code
FDMS0310AS = Specific Device Code
E
Single Pulse Avalanche Energy (Note 3)
Power Dissipation:
33
mJ
W
AS
P
D
T
= 25°C
41
2.5
C
ORDERING INFORMATION
T = 25°C (Note 1a)
A
T , T
Operating and Storage Junction
Temperature Range
−55 to
+150
°C
J
STG
†
Device
Package
Shipping
FDMS0310AS PQFN8 5X6, 1.27P
(Pb−Free, Halide
3000 /
Tape & Reel
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2010
1
Publication Order Number:
April, 2023 − Rev. 3
FDMS0310AS/D