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FAN7383 PDF预览

FAN7383

更新时间: 2024-01-27 02:15:20
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 驱动器栅极栅极驱动
页数 文件大小 规格书
16页 1265K
描述
Half-Bridge Gate-Drive IC

FAN7383 技术参数

是否Rohs认证: 符合生命周期:Transferred
包装说明:,Reach Compliance Code:compliant
风险等级:5.74接口集成电路类型:HB BASED PERIPHERAL DRIVER WITH PWM
JESD-609代码:e3湿度敏感等级:3
峰值回流温度(摄氏度):260端子面层:Matte Tin (Sn)
处于峰值回流温度下的最长时间:30Base Number Matches:1

FAN7383 数据手册

 浏览型号FAN7383的Datasheet PDF文件第2页浏览型号FAN7383的Datasheet PDF文件第3页浏览型号FAN7383的Datasheet PDF文件第4页浏览型号FAN7383的Datasheet PDF文件第6页浏览型号FAN7383的Datasheet PDF文件第7页浏览型号FAN7383的Datasheet PDF文件第8页 
Absolute Maximum Ratings  
The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The  
device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables  
are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table defines the  
conditions for actual device operation. TA = 25°C unless otherwise specified.  
Symbol  
VS  
Parameter  
High-side offset voltage  
Min.  
VB-25  
-0.3  
Max.  
VB+0.3  
625  
Unit  
V
V
VB  
High-side floating supply voltage  
High-side floating output voltage HO1, HO2  
Low-side and logic fixed supply voltage  
Low-side output voltage LO1, LO2  
Logic input voltage (IN)  
VHO  
VDD  
VLO  
VS-0.3  
-0.3  
VB+0.3  
25  
V
V
-0.3  
VDD+0.3  
VDD+0.3  
VDD+0.3  
5.0  
V
VIN  
-0.3  
V
VSD  
Shutdown logic input voltage  
Dead-time control voltage  
-0.3  
V
VDT  
-0.3  
V
GND  
dVS/dt  
Logic ground  
VDD-25  
VDD+0.3  
50  
V
Allowable offset voltage slew rate  
Power dissipation  
V/nsec  
W
(1)(2)(3)  
PD  
1.0  
θJA  
TJ  
Thermal resistance, junction-to-ambient  
Junction temperature  
110  
°C/W  
°C  
°C  
150  
TSTG  
Storage temperature  
150  
Notes:  
1. When mounted on 76.2 x 114.3 x 1.6mm PCB. (FR-4 glass epoxy material).  
2. Please refer to:  
JESD51-2: Integral circuits thermal test method environmental conditions - Natural convection  
JESD51-3: Low effective thermal conductivity test board for leaded surface mount packages  
3. Do not exceed PD under any circumstances.  
Recommended Operating Conditions  
Symbol  
VB  
Parameter  
High-side floating supply voltage  
High-side floating supply offset voltage  
Low-side supply voltage  
Condition  
Min.  
VS+15  
6-VDD  
15  
Max.  
VS+20  
600  
Unit  
V
V
VS  
VDD  
VHO  
VLO  
VIN  
20  
V
High-side (HO) output voltage  
Low-side (LO) output voltage  
Logic input voltage (IN)  
VS  
VB  
V
GND  
GND  
-40  
VDD  
VDD  
125  
V
V
TA  
Ambient temperature  
°C  
© 2006 Fairchild Semiconductor Corporation  
FAN7383 Rev. 1.0.0  
www.fairchildsemi.com  
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