FAN5910
Operating Description
In all cases, it is recommended that sharp V
CON
transitions be applied, letting the transition controller
optimize the output voltage slew rate.
The FAN5910 is a high−efficiency, synchronous,
step−down converter (DC−DC) with LDO−assist function.
The DC−DC converter operates with current−mode
control and supports a wide range of load currents.
High−current applications up to a 2.5 A DC output, such as
mandated by GSM/EDGE applications, are allowed.
Performance degradation due to spurs is removed by
spreading the ripple energy through clock dither. A
regulated Bypass Mode continues to regulate the output to
DVOUT Positive Step
After a V
positive step, the FAN5910 enters
CON
Current−Limit Mode, where V
ramps with a constant
OUT
slew rate dictated by the output capacitor and the current
limit.
DVOUT Negative Step
the desired voltage as V approaches V
. The LDO
IN
OUT
After a V
negative step, the FAN5910 enters Current
CON
offers a dropout voltage of approximately 100 mV under a
2 A load current.
Limit Mode where V
is reduced with a constant slew
OUT
rate dictated by the output capacitor and the current limit.
The output voltage V
input control voltage, V
is regulated to 2.5 times the
, set by an external DAC. The
OUT
VOUT Transition to or from Forced Bypass
CON
FAN5910 operates in either PWM or PFM Mode, depending
on the output voltage and load current.
The DC−DC is forced into 100% duty cycle for V
CON
nominally greater than 1.6 V. This allows the output to be
connected to the supply through both the low−resistance
DC−DC and the LDO PFETs.
In Pulse Width Modulation (PWM) Mode, regulation
begins with on−state. A P−channel transistor is turned on
and the inductor current is ramped up until the off−state
begins. In the off−state, the P−channel is switched off and an
N−channel transistor is turned on. The inductor current
decreases to maintain an average value equal to the DC load
current. The inductor current is continuously monitored. A
current sense flags when the P−channel transistor current
exceeds the current limit and the switcher is turned back to
off−state to decrease the inductor current and prevent
magnetic saturation. The current sense flags when the
N−channel transistor current exceeds the current limit and
redirects discharging current through the inductor back to
the battery.
VOUT Transition at Startup
At startup, after the EN rising edge is detected, the system
requires 25 ms for all internal voltage references and
amplifiers to start before enabling the DC−DC converter
function.
MODE Pin
The MODE pin enable Forced PWM Mode or Auto
PFM / PWM Mode. When the MODE pin is toggled HIGH
(logic 1), the FAN5910 operates in PFM for V
< 1.5 V
OUT
under light−load conditions and PWM for heavy−load
conditions. If the MODE pin is set LOW (logic = 0), it
operates in Forced PWM Mode.
In Pulse Frequency Modulation (PFM) Mode, the
FAN5910 operates in a constant on−time mode at low load
currents. During on−state, the P−channel is turned on for a
specified time before switching to off−state. In off−state, the
N−channel switch is enabled until inductor current
decreases to 0A. The switcher enters three−state until a new
regulation cycle starts.
PFM operation is allowed only in Low−Power Mode
(MODE=1) for output voltages nominally less than 1.5 V. At
low load currents, PFM achieves higher efficiency than
PWM. The trade−off for efficiency improvement, however,
is larger output ripple. Some applications, such as audio,
may not tolerate the higher ripple, especially at high output
voltages.
Auto PFM / PWM Mode (MODE = 1)
Auto PFM/PWM Mode is appropriate for 3G/3.5G and
4G applications.
Forced PWM Mode (MODE = 0)
Forced PWM Mode is appropriate for applications that
demand minimal ripple over the entire output voltage range.
Bypass Mode
Bypass mode is entered based on the voltage difference
between the battery voltage and the internal Vref voltage.
The threshold when DCDC enters bypass mode is
VIN=VOUT+200 mV. In bypass mode, the low Rds on LDO
PFET is active and the DCDC is running with 100% duty
cycle, which allows very low voltage dropout and load
current of up to 2.5 A.
Bypass mode can also be automatically entered when
Vcon exceeds 1.6 V and exits when Vcon is below 1.4 V.
When the BPEN pin is low, the FAN5910 runs in automatic
bypass mode where bypass operation depends on VCON.
The BPEN pin set high can be used to ignore bypass flags
and enable forced bypass mode. Bypass mode is active
regardless of VCON including overriding sleep mode when
BPEN is high.
Dynamic Output Voltage Transitions
FAN5910 has a complex voltage transition controller that
realizes fast transition times with a large output capacitor
and output voltage ranges.
The transition controller manages five transitions:
• DV
• DV
• DV
• DV
positive step
negative step
transition to or from 100% duty cycle
transition at startup
OUT
OUT
OUT
OUT
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