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FAN501A

更新时间: 2024-02-13 06:48:55
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飞兆/仙童 - FAIRCHILD /
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16页 1348K
描述
Offline DCM / CCM Flyback PWM Controller for Charger Applications

FAN501A 数据手册

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The unified output current equation both for DCM and  
CCM operation is obtained as:  
tDIS(n)  
0.85∙tDIS(n-1)  
 
퐷퐼푆  퐶푆_푀푖푑 퐷퐼푆  
200mV  
(4)  
 =  
 퐷푆_푀푖푑  
=
 
퐶푆  
 
VS  
VCS_Mid is obtained by sampling the current-sense  
voltage at the middle of the MOSFET conduction time.  
The diode current discharge time is obtained by  
detecting the diode current zero-crossing instant. Since  
the diode current cannot be sensed directly in the  
primary side, Zero-Crossing Detection (ZCD) is  
accomplished indirectly by monitoring the auxiliary  
winding voltage in the primary side. When the diode  
current reaches zero, the transformer winding voltage  
begins to drop sharply. To detect the corner voltage, the  
VS is sampled, called VSH, at 85% of diode current  
discharge time (tDIS) of the previous switching cycle and  
compared with the instantaneous VS voltage. When  
instantaneous voltage of the VS pin drops below VSH by  
more than 200 mV, the ZCD of diode current is  
obtained, as shown in Figure 23.  
VSH  
ZCD  
Figure 23. Operation Waveform for ZCD Function  
Line Voltage Detection and its Utilization  
The FAN501A indirectly senses line voltage using the  
current flowing out of the VS pin while the MOSFET is  
turned on, as illustrated in Figure 25 and Figure 26.  
During the MOSFET turn-on period, auxiliary winding  
The output current can be programmable by setting  
current sensing resistor as:  
voltage, VAux, reflects input bulk capacitor voltage, VBLK  
,
by the transformer coupling between primary and  
auxiliary. During MOSFET conduction time, the line  
voltage detector clamps the VS pin voltage ~0.5 V and  
the current, IVS, flowing from the VS pin is expressed as:  
NP VCCR  
1
RCS  
(5)  
IO NS KCC  
where VCCR is the internal voltage for CC control and  
KCC is the IC design parameter, 12 for the FAN501A.  
NA / NP VBLK  
0.5  
IVS  
+
(6)  
RVS1  
RVS1 / /RVS 2  
IDS-Mid  
IDS  
Typically, the second term in Equation (6) can be  
ignored because it is much smaller than the first term.  
The current, IVS, is approximately proportional to the line  
voltage, calculated as:  
½ tON  
ID-Mid = NPS∙IDS-Mid  
IO = <ID>Ts  
ID  
NA / NP  
IVS  
VBLK  
(7)  
½ tDIS  
RVS1  
The IVS current, reflecting the line voltage information, is  
used for dual switching frequency operation, CC control  
correction weighting, and brownout protection; as  
illustrated in Figure 25.  
VS  
tON  
tDIS  
tS  
Dual Switching Frequency  
The FAN501A changes the switching frequency  
between 85 kHz and 140 kHz according to the line  
voltage. It is typical to design the flyback converter to  
operate in CCM for low line and DCM in high line.  
Therefore, the peak transformer current decreases as  
the operation mode changes from CCM to DCM, as  
shown in Figure 24(a), for single-frequency operation.  
The transformer is not fully utilized at high line when a  
single switching frequency is used. The peak  
transformer current can be maintained almost constant  
when the flyback converter operates at lower frequency  
at high line, as illustrated in Figure 24(b). This allows full  
transformer utilization and improves the efficiency by  
decreasing the switching losses at high line.  
Figure 21. Waveforms of DCM Flyback Converter  
IDS-Mid  
IDS  
½ tON  
ID-Mid = NPS∙IDS-Mid  
IO = <ID>Ts  
ID  
½ tDIS  
VS  
When IVS is larger than IVS-H (750 µA), the switching  
frequency is set at fOSC-L (85 kHz) in CV Mode. When IVS  
is less than IVS-L (680 µA), the switching frequency is set  
at fOSC-H (140 kHz) in CV Mode. For the universal line  
range, the frequency change should occur between 132  
~ 180 VAC to avoid the transition within the actual  
tON  
tDIS  
tS  
Figure 22. Waveforms of CCM Flyback Converter  
© 2014 Fairchild Semiconductor Corporation  
www.fairchildsemi.com  
FAN501A • Rev. 1.0.0  
10  
 
 

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