ENA
1
8
ENB
ENA
1
8
ENB
1
8
INA+
INA+
1
8
GND
INA-
+
-
+
-
INA
GND
INB
2
3
4
A
7
6
5
OUTA
VDD
INA
GND
INB
2
3
4
A
7
6
5
OUTA
VDD
INB+
GND
2
3
4
A
B
7
6
5
OUTA
VDD
2
3
4
A
B
7
6
5
OUTA
VDD
INA
-
INB+
+
-
+
-
OUTB
OUTB
OUTB
OUTB
B
B
INB-
INB
-
FAN3226
FAN3227
FAN3228
FAN3229
Figure 4. Pin Configurations (Repeated)
Pin Definitions
Name
Pin Description
Enable Input for Channel A. Pull pin LOW to inhibit driver A. ENA has TTL thresholds for both TTL and
CMOS INx threshold.
ENA
ENB
Enable Input for Channel B. Pull pin LOW to inhibit driver B. ENB has TTL thresholds for both TTL and
CMOS INx threshold.
GND
INA
Ground. Common ground reference for input and output circuits.
Input to Channel A.
INA+
INA-
INB
Non-Inverting Input to Channel A. Connect to VDD to enable output.
Inverting Input to Channel A. Connect to GND to enable output.
Input to Channel B.
INB+
INB-
Non-Inverting Input to Channel B. Connect to VDD to enable output.
Inverting Input to Channel B. Connect to GND to enable output.
OUTA Gate Drive Output A: Held LOW unless required input(s) are present and VDD is above UVLO threshold.
OUTB Gate Drive Output B: Held LOW unless required input(s) are present and VDD is above UVLO threshold.
Gate Drive Output A (inverted from the input): Held LOW unless required input is present and VDD is
OUTA
above UVLO threshold.
Gate Drive Output B (inverted from the input): Held LOW unless required input is present and VDD is
above UVLO threshold.
OUTB
Thermal Pad (MLP only). Exposed metal on the bottom of the package; may be left floating or connected
to GND; NOT suitable for carrying current.
P1
VDD
Supply Voltage. Provides pow er to the IC.
Output Logic
FAN3228 and FAN3229
FAN3226 (x=A or B)
FAN3227 (x=A or B)
(x=A or B)
ENx
INx
ENx
INx
OUTx
INx+
INx−
OUTx
OUTx
0
0
1(8)
1(8)
0
1(8)
0
0
0
0
1(8)
1(8)
0(8)
0
0
0
1
0(8)
0(8)
1
0
1(8)
0
0
0
1
0
0
1
0
1
0(8)
1
1(8)
1
1(8)
Note:
8. Default input signal if no external connection is made.
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