HCMOS 3.2x2.5mm 2.5V SMD Oscillator
Rev. 10/21/2008
RoHS Compliant / Pꢁ Free
Model: F340 Series
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FEATURES
XpressO® Equivalent
FXO-HC32
• 2.5V Operation
• HCMOS Output
• Low Power Consumption
• Standby Function
Why XpressO?
• Tape and Reel (2,000 pcs. STD)
Lower Cost, Faster Delivery, Low Jitter!
• PART ꢀUMbER SELECTIOꢀ Learn More - Internet Required
3.2 ± 0.2
Model
Number
F340
Frequency
Operating
Frequency
Part Number
#3
#4
Stability1 Temperature (ºC) Range (MHz)
639-Frequency-xxxxx
643-Frequency-xxxxx
640-Frequency-xxxxx
644-Frequency-xxxxx
641-Frequency-xxxxx
645-Frequency-xxxxx
642-Frequency-xxxxx
±100PPM
±100PPM
±50PPM
±50PPM
±25PPM
±25PPM*
±20PPM*
-10 ~ +70
-40 ~ +85
-10 ~ +70
-40 ~ +85
-10 ~ +70
-40 ~ +85
-10 ~ +70
0.625 ~ 75.000
0.625 ~ 75.000
0.625 ~ 75.000
0.625 ~ 75.000
0.625 ~ 75.000
1.800 ~ 50.000
1.800 ~ 50.000
Top
F340R
F345
F345R
F346
2.5 ± 0.2
1.2 M ax
View
#2
Dot denotes #1
Pin 1
F346R
F348
• ELECTRICAL CHARACTERISTICS
MAX (unless otherwise noted)
PARAMETERS
Frequency Range (Fo)
Storage Temperature Range (Tstg)
Supply Voltage
Input Current
1.2
0.625 ~ 75.000 MHz
-55ºC ~ +125ºC
2.5V ± 5%
#1
#2
Bottom
(Vdd)
(Idd)
0.7
0.8
View
#4
#3
0.625 ~ 20.000 Mhz
20.000+ ~ 40.000 Mhz
5mA
9mA
0.9
40.000+ ~ 60.000 Mhz
11mA
60.000+ ~ 75.000 Mhz
14mA
Output Symmetry (50% Vdd)
Rise Time (10% ~ 90% Vdd) (Tr)
Fall Time (90% ~ 10% Vdd) (Tf)
45% ~ 55%
6nS
Recommended
Solder Pad Layout
6nS
1.4
Output Voltage
(Vol)
(Voh)
(Iol)
(Ioh)
10% Vdd
90% Vdd Min
2mA Min
-2mA Min
15pF
Output Current
1.2
0.5
Output Load
(HCMOS)
#1
Standby Current
Start-up Time
10µA
5mS
150nS
5mS
(Ts)
Output Disable Time 2
1.0
Output Enable Time 2
All dimensions are in millimeters.
Maximum Solder Temp / Time
Moisture Sensitivity Level (MSL)
Termination Finish
260ºC / 10 Seconds
1
Pin Connections
Au
1 Inclusive of 25ºC tolerance, operating temperature range, input voltage change, load change, ag-
ing, shock, and vibration. *Excludes Shock/Vibration
#1 E/D
#2 G ND
#3 O utput
#4 V DD
2 An internal pullup resistor from pin 1 to pin 4 allows active output if pin 1 is left open.
Note: A 0.01µF bypass capacitor should be placed between VDD (Pin 4) and GND (Pin 2) to
minimize power supply line noise.
Drawing is for reference to critical specifications defined by size measurements.
Certain non-critical visual attributes, such as side castellations, reference pin shape, etc. may
vary. All specifications subject to change without notice.
• EꢀAbLE / DISAbLE FUꢀCTIOꢀ
INH (Pin 1)
OPEN 2
OUTPUT (Pin 3)
ACTIVE
'1' Level Vih ≥ 70% Vdd
'0' Level Vil ≤ 30% Vdd
ACTIVE
High Z
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