Datasheet > F124NB

F124NB

更新时间： 2022-04-23 23:00:11

品牌	Logo	应用领域
富士通 - FUJITSU		微控制器
页数	文件大小	规格书
80页	1518K
描述
8-bit Microcontrollers

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数据手册

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F124NB 数据手册

MB95120MB Series

■ PRODUCT LINEUP

MB95F124MB

MB95F126MB

MB95F128MB

MB95F124NB

MB95F126NB

MB95F128NB

MB95F124JB

MB95F126JB

MB95F128JB

Part number

MB95128MB

Parameter

MASK ROM

Type

Flash memory product

product

ROM capacity*¹

RAM capacity*¹

60 Kbytes (Max)

2 Kbytes (Max)

Yes

Reset output

Clock system

Yes/No

Dual clock

Low voltage

detection reset

Yes/No

Yes

Clock supervisor

Yes

Number of basic instructions

Instruction bit length

Instruction length

: 136

: 8 bits

: 1 to 3 bytes

: 1, 8, and 16 bits

CPU functions

Data bit length

Minimum instruction execution time : 61.5 ns (at machine clock frequency 16.25 MHz)

Interrupt processing time : 0.6 μs (at machine clock frequency 16.25 MHz)

General-purpose I/O port (N-ch open drain)

General-purpose I/O port (CMOS)

Programmable input voltage levels of port :

: 2 ports

: 85 ports

Ports (Max 87 ports)

Automotive input level / CMOS input level / hysteresis input level

Interrupt cycle : 0.5 ms, 2.1 ms, 8.2 ms, 32.8 ms (at main oscillation clock 4 MHz)

Reset generated cycle

Timebase timer

(1 channel)

Watchdog timer

Wild register

At main oscillation clock 10 MHz

At sub oscillation clock 32.768 kHz

: Min 105 ms

: Min 250 ms

Capable of replacing 3 bytes of ROM data

Master/slave sending and receiving

Bus error function and arbitration function

Detecting transmitting direction function

Start condition repeated generation and detection functions

Built-in wake-up function

I²C

(1 channel)

Data transfer capable in UART/SIO

Full duplex double buffer

UART/SIO

(1 channel)

Variable data length (5/6/7/8-bit), built-in baud rate generator

NRZ type transfer format, error detected function

LSB-first or MSB-first can be selected.

Clock asynchronous (UART) or clock synchronous (SIO) serial data transfer capable

Dedicated reload timer allowing a wide range of communication speeds to be set.

Full duplex double buffer.

Clock asynchronous (UART) or clock synchronous (SIO) serial data transfer capable

LIN functions available as the LIN master or LIN slave.

LIN-UART

(1 channel)

8/10-bit A/D converter

(12 channels)

8-bit or 10-bit resolution can be selected.

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1 2 345 6 7...80

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