Datasheet > F0443

F0443

更新时间： 2024-02-10 13:30:02

品牌	Logo	应用领域
瑞萨 - RENESAS		/
页数	文件大小	规格书
65页	6308K
描述
Dual Matched Broadband RF DVGA 0.6GHz to 2.7GHz

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F0443 技术参数

是否无铅：	不含铅	生命周期：	Active
零件包装代码：	LGA	针数：	48
Reach Compliance Code：	compliant	风险等级：	5.67
Base Number Matches：	1

F0443 数据手册

Dual Matched Broadband RF

DVGA 0.6GHz to 2.7GHz

F0443

Datasheet

Description

Features

The F0443 is a highly integrated 0.6GHz to 2.7GHz dual channel

RF digital variable gain amplifier designed for use in

diversity/MIMO receivers. The F0443 provides two independent

receiver paths each with 29.5dB typical maximum gain and 3.2dB

NF at 2.5GHz.

RF Frequency Range: 0.6GHz to 2.7GHz

Gain at 2.5GHz:

• 29.5dB typical max gain in non-bypass mode

• 10.9dB typical max gain in bypass mode

DSA Control

For each path, gain control is split into four separate digital step

attenuators: DSA0 provides 6dB of attenuation in a single step

using SPI/I3C control. Its counterpart, DSA1, also provides 6dB of

attenuation in a single step but it is programmed instead using an

external direct control pin. DSA2 yields 29dB of SPI/I3C-controlled

attenuation in 1dB steps, while its counterpart, DSA3, includes

18dB attenuation in 6dB steps programmed via two external control

pins. The device offers +39dBm nominal output IP3 at 2.5GHz

using 372mA total I_CCfor two active paths with a +5V supply

voltage.

• DSA0: Single 6dB step via SPI/I3C control

• DSA1: Single 6dB step via 1-bit external pin control

• DSA2: 29dB range in 1dB steps via SPI/I3C control

• DSA3: 18dB range in 6dB steps via 2-bit external pin

control

+39dBm OIP3 at 2.5GHz

NF at 2.5GHz

• 3.2dB typical in non-bypass mode

• 8.9dB typical in bypass mode

+19.7dBm OP1dB at 2.5GHz

I_CC= 372mA

The F0443 is packaged in a 7 × 7 mm, 48-LGA with 50Ω single-

ended RF input and RF output impedances for ease of integration

into the signal path.

Standby Mode for power savings with 9mA standby current

50Ω single-ended input/output impedances

1.8V logic support

Competitive Advantage

High Linearity via Renesas’ patented Zero-Distortion™

Technology

Operating temperature (T_EPAD) range: -40°C to +105°C

7 × 7 mm 48-LGA package

Exceptionally Low Gain Overshoot/Undershoot via Renesas’

patented Glitch-Free™ Technology

Low Noise Figure

Low DC Current

High Integration

High Reliability

Block Diagram

Figure 1. Block Diagram

RF AMP1_A

6dB

29dB

18dB

DSA0_A

DSA1_A

DSA2_A RF AMP2_A DSA3_A

Typical Applications

RFOUT_A

RFIN_A

Multi-mode, Multi-carrier Receivers

Distributed Antenna Systems

Digital Radios

Decode

Logic

Bias

Control

RFOUT_B

RFIN_B

DSA0_B

6dB

DSA1_B

6dB

DSA2_B RF AMP2_B DSA3_B

29dB

18dB

RF AMP1_B

September 1, 2020

12 3 4 5 6 7...65

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