Datasheet > EP2645PD-13.500M

EP2645PD-13.500M

更新时间： 2024-02-22 04:06:38

品牌	Logo	应用领域
日蚀 - ECLIPTEK		机械石英晶振振荡器
页数	文件大小	规格书
10页	797K
描述
CMOS, Quartz Crystal Clock Oscillators XO (SPXO) LVCMOS (CMOS) 3.3Vdc 4 Pad 5.0mm x 7.0mm Ceramic Surface Mount (SMD) Quartz Crystal Clock Oscillators XO (SPXO) LVCMOS (CMOS) 3.3Vdc 4 Pad 5.0mm x 7.0mm Ceramic Surface Mount (SMD)

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EP2645PD-13.500M 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Active	零件包装代码：	SMD 5.0mm x 7.0mm
针数：	4	Reach Compliance Code：	compliant
风险等级：	5.67	其他特性：	POWER-DOWN; ENABLE/DISABLE FUNCTION; BULK; TAPE
最长下降时间：	4 ns	频率调整-机械：	NO
频率稳定性：	50%	JESD-609代码：	e4
安装特点：	SURFACE MOUNT	标称工作频率：	13.5 MHz
最高工作温度：	70 °C	最低工作温度：	-20 °C
振荡器类型：	CMOS	输出负载：	30 pF
物理尺寸：	7.0mm x 5.0mm x 1.6mm	最长上升时间：	4 ns
最大供电电压：	3.6 V	最小供电电压：	3 V
标称供电电压：	3.3 V	表面贴装：	YES
最大对称度：	60/40 %	端子面层：	Nickel/Gold (Ni/Au)

EP2645PD-13.500M 数据手册

Ecliptek | EP26 Series Oscillator

http://www.ecliptek.com/oscillators/EP26/

Log On | 714-433-1200 | Email Customer Support

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EP26 Series Oscillator

Quartz Crystal Clock Oscillators XO (SPXO) LVCMOS (CMOS) 3.3Vdc 4 Pad 5.0mm x 7.0mm Ceramic Surface Mount (SMD)

2011/65 +

168 SVHC

2015/863

Revision H 03/25/2014

Electrical Specifications

Nominal Frequency

1.000MHz to 106.250MHz

Some frequencies within this range may not be available.

Frequency Tolerance/Stability

(Inclusive of all conditions: Calibration Tolerance at 25°C, Frequency

Stability over the Operating Temperature Range, Supply Voltage

Change, Output Load Change, First Year Aging @25°C, Shock, and

Vibration)

±100ppm Maximum

±50ppm Maximum

Operating Temperature Range

-20°C to +70°C

-40°C to +85°C

Supply Voltage (V

Input Current

)

3.3V

±0.3V

DC DC

28mA Maximum (Unloaded)

Output Voltage Logic High (V

)

-0.4V Minimum (I = -8mA)

DC OH

Output Voltage Logic Low (V

Duty Cycle

)

0.4V

Maximum (I = +8mA)

DC OL

Measured at 50% of waveform

50 ±10(%)

50 ±5(%)(Only available over Nominal Frequency of 1M to 50M)

Rise Time/Fall Time

Load Drive Capability

Measured at 20% to 80% of Waveform

4nSec Maximum

30pF Maximum over Nominal Frequency of 1MHz to 50MHz

15pF Maximum over Nominal Frequency of 50.000001MHz to

106.25MHz

Output Logic Type

Pin 1 Connection

CMOS

Power Down (Disable Output: Logic Low)

Tri-State (Disabled Output: High Impedance)

Tri-State Input Voltage (Vih and Vil)

70% of V

Minimum to enable output, 20% of V

Maximum to

disable output, No Connect to enable output.

Standby Current

Disable Current

20µA Maximum (Pin 1 = Ground)

16mA Maximum (Pin 1 = Ground)

Absolute Clock Jitter

±250pSec Maximum, ±100pSec Typical over Nominal Frequency of

1MHz to 33MHz

±125pSec Maximum, ±75pSec Typical over Nominal Frequency of

33.000001MHz to 106.25MHz

One Sigma Clock Period Jitter

±50pSec Maximum over Nominal Frequency of 1MHz to 33MHz

±40pSec Maximum over Nominal Frequency of 33.000001MHz to

106.25MHz

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