Contents
Contents
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2
3
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5
6
General Description ................................................................................................ 1
Features ................................................................................................................... 1
Pin Assignment ....................................................................................................... 2
Pin Description........................................................................................................ 4
Block Diagram ......................................................................................................... 9
Function Description............................................................................................. 10
6.1 Register Configuration ....................................................................................10
6.1.1 R PAGE Register Configuration........................................................................10
6.2 Register Operations........................................................................................10
6.2.1 R0 (Indirect Addressing Register).....................................................................10
6.2.2 R1 (TCC)...........................................................................................................10
6.2.3 R2 (Program Counter) ...................................................................................... 11
6.2.4 R3 (LVD Control and Status).............................................................................12
6.2.5 R4 (RAM Select Register).................................................................................13
6.2.6 Bank 0 R5 (RAM Bank Select Register) ...........................................................13
6.2.7 Bank 0 R7 (Port 7) ............................................................................................13
6.2.8 Bank 0 R8 (Port 8) ............................................................................................13
6.2.9 Bank 0 R9 (Port 9) ............................................................................................14
6.2.10 Bank 0 RA (Port A)............................................................................................14
6.2.11 Bank 0 RB (Port B) ...........................................................................................14
6.2.12 Bank 0 RC SCCR (System Clock Control Register).........................................14
6.2.13 Bank 0 RD TWTCR (TCC and WDT Timer Control Register) ..........................15
6.2.14 Bank 0 RE IMR (Interrupt Mask Register) ........................................................16
6.2.15 Bank 0 RF ISR (Interrupt Status Register)........................................................16
6.2.16 Bank 1 R5 LCDCR (LCD Control Register) ......................................................17
6.2.17 Bank 1 R6 LCDAR (LCD Address Register).....................................................17
6.2.18 Bank 1 R7 LCDBR (LCD Data Buffer) ..............................................................18
6.2.19 Bank 1 R8 LCDVCR (LCD Voltage Control Register).......................................18
6.2.20 Bank 1 R9 LCDCCR (LCD COM Control Register 3).......................................19
6.2.21 Bank 1 RA LCDSCR0 (LCD Segment Control Register 0)...............................19
6.2.22 Bank 1 RB LCDSCR1 (LCD Segment Control Register 1)...............................19
6.2.23 Bank 1 RC LCDSCR2 (LCD Segment Control Register 2) ..............................20
6.2.24 Bank 1 RE EIMR (External Interrupt Mask Register)........................................20
6.2.25 Bank 1 RF EISR (External Interrupt Status Register).......................................20
6.2.26 Bank 2 R5 T1CR (Timer 1 Control Register) ....................................................21
6.2.27 Bank 2 R6 TSR (Timer Status Register) ...........................................................22
6.2.28 Bank 2 R7 T1PD (Timer 1 Period Buffer)..........................................................23
6.2.29 Bank 2 R8 T1TD (Timer 1 Duty Buffer).............................................................23
6.2.30 Bank 2 R9 T2CR (Timer 2 Control Register) ....................................................23
Product Specification (V1.4) 04.08.2016
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