Datasheet > EM68C16CWQE-25IH

EM68C16CWQE-25IH

更新时间： 2022-02-26 12:34:35

品牌	Logo	应用领域
钰创 - ETRON		动态存储器双倍数据速率
页数	文件大小	规格书
56页	1005K
描述
64M x 16 bit DDRII Synchronous DRAM (SDRAM)

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EM68C16CWQE-25IH 数据手册

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EtronTech

EM68C16CWQE

Operation Mode

Table 4 shows the truth table for the operation commands.

Table 4. Truth Table (Note (1), (2))

Command

BankActivate

State CKE_n-1CKE_nDM BA0-2 A10 A0-9, 11-12 CS# RAS# CAS# WE#

Idle⁽³⁾

Row address

Single Bank Precharge

All Banks Precharge

Write

Any

Active⁽³⁾

Column

address

Write with AutoPrecharge

(A0 – A9)

Active⁽³⁾

Column

address

Read

Read and Autoprecharge

(A0 – A9)

(Extended) Mode Register Set

No-Operation

Idle

Any

OP code

Burst Stop

Active⁽⁴⁾

Any

Device Deselect

Refresh

Idle

SelfRefresh Entry

Idle

SelfRefresh Exit

Idle

Any

Power Down Mode Entry

Power Down Mode Exit

Data Input Mask Disable

Data Input Mask Enable(5)

Active

NOTE 1: V=Valid data, X=Don't Care, L=Low level, H=High level

NOTE 2: CKEn signal is input level when commands are provided.

NOTE 3: CKEn_-1signal is input level one clock cycle before the commands are provided.

NOTE 4: These are states of bank designated by BA signal.

NOTE 5: Device state is 4, and 8 burst operation.

NOTE 6: LDM and UDM can be enabled respectively.

Etron Confidential

Rev. 1.0

Jan. /2014

1...4 5 678 9 10...56

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