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EL2252C PDF预览

EL2252C

更新时间: 2024-01-16 18:22:38
品牌 Logo 应用领域
ELANTEC 比较器
页数 文件大小 规格书
12页 302K
描述
Dual 50 MHz Comparator/Pin Receiver

EL2252C 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
Reach Compliance Code:unknown风险等级:5.87
Is Samacsys:N放大器类型:COMPARATOR
25C 时的最大偏置电流 (IIB):12 µA最大输入失调电压:10000 µV
JESD-30 代码:R-XDIP-T14JESD-609代码:e0
标称负供电电压 (Vsup):-15 V端子数量:14
最高工作温度:125 °C最低工作温度:-55 °C
封装主体材料:CERAMIC封装代码:DIP
封装等效代码:DIP14,.3封装形状:RECTANGULAR
封装形式:IN-LINE电源:+-15 V
认证状态:Not Qualified标称响应时间:0.009 ns
子类别:Comparators最大压摆率:20 mA
标称供电电压 (Vsup):15 V表面贴装:NO
技术:BIPOLAR温度等级:MILITARY
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
Base Number Matches:1

EL2252C 数据手册

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EL2252C  
Dual 50 MHz Comparator/Pin Receiver  
DC Electrical Characteristics  
e
e
25 C unless otherwise specified Ð Contd.  
g
V
S
15V; HYS and /TTL grounded; T  
§
A
Test Level  
EL2252C  
Parameter  
CMRR  
Description  
Temp  
Min  
Typ  
Max  
Units  
Common-Mode Rejection Ratio  
(Note 1)  
Full  
Full  
70  
70  
95  
90  
60  
II  
II  
V
dB  
dB  
PSRR  
Power-Supply Rejection Ratio  
(Note 2)  
V
Peak-to-Peak Input Hysteresis  
HYS  
OH  
25 C  
§
mV  
b
with HYS connected to V  
V
High Level Output, CMOS Mode  
Full  
Full  
Full  
Full  
Full  
Full  
4.0  
2.4  
4.6  
2.7  
0.2  
0.4  
16  
5.1  
3.2  
0.8  
0.8  
19  
II  
II  
II  
II  
II  
II  
V
V
TTL Mode  
e
b
V
OL  
Low Level Output, I1  
I1  
0
0.2  
V
e
b
5 mA  
0.2  
V
a
I
I
Positive Supply Current  
Negative Supply Current  
mA  
mA  
S
b
17  
20  
S
AC Electrical Characteristics  
e
e
e
10 pF; T  
A
g
V
S
15V; C  
25 C; TTL output threshold is 1.4V, CMOS output threshold is 2.5V; unless otherwise specified  
§
L
Test Level  
Parameter  
Description  
Min  
Typ  
Max  
Units  
EL2252C  
T
T
T
, T  
Input to Output Propagation Delay,  
a
a
b
b
PD  
PD  
k
k
5V, 500 mV Overdrive,  
0
V
IN  
6
8
5
9
III  
V
ns  
ns  
ns  
2000 V/ms Input Slew Rate  
TTL Output Swing  
CMOS Output Swing  
, T  
PD  
Input to Output Propagation Delay,  
PD  
k
k
b
b
2V  
V
IN  
1V, 500 mV Overdrive,  
9
III  
2 ns Input Rise Time  
TTL Output Swing  
CMOS Output Swing  
9
V
V
ns  
ns  
Propagation Delay Change between  
Positive and Negative Input Slopes  
PDSYM  
1.25  
e
b
b
e
0V to 10V.  
CM  
Note 1: Two tests are performed with V  
0V to 9V and V  
CM  
a e  
b
b
Note 2: Two tests are performed with V  
V
15V, V changed from 10V to 15V;  
b e b  
a
15V, V changed from 10V to 15V.  
3

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