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E0C6S46F PDF预览

E0C6S46F

更新时间: 2024-02-20 16:39:41
品牌 Logo 应用领域
精工 - SEIKO 时钟外围集成电路
页数 文件大小 规格书
8页 86K
描述
4-BIT, MROM, 2MHz, MICROCONTROLLER, PQFP128, PLASTIC, QFP5-128

E0C6S46F 技术参数

生命周期:Obsolete零件包装代码:QFP
包装说明:FQFP,针数:128
Reach Compliance Code:unknownHTS代码:8542.31.00.01
风险等级:5.84具有ADC:NO
其他特性:OPERATES AT -3V SUPPLY地址总线宽度:
位大小:4最大时钟频率:2 MHz
DAC 通道:NODMA 通道:NO
外部数据总线宽度:JESD-30 代码:R-PQFP-G128
长度:20 mmI/O 线路数量:44
端子数量:128最高工作温度:70 °C
最低工作温度:-20 °CPWM 通道:NO
封装主体材料:PLASTIC/EPOXY封装代码:FQFP
封装形状:RECTANGULAR封装形式:FLATPACK, FINE PITCH
认证状态:Not QualifiedROM可编程性:MROM
座面最大高度:3 mm速度:2 MHz
最大供电电压:5.5 V最小供电电压:3.5 V
标称供电电压:5 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子形式:GULL WING端子节距:0.5 mm
端子位置:QUAD宽度:14 mm
uPs/uCs/外围集成电路类型:MICROCONTROLLERBase Number Matches:1

E0C6S46F 数据手册

 浏览型号E0C6S46F的Datasheet PDF文件第2页浏览型号E0C6S46F的Datasheet PDF文件第3页浏览型号E0C6S46F的Datasheet PDF文件第4页浏览型号E0C6S46F的Datasheet PDF文件第5页浏览型号E0C6S46F的Datasheet PDF文件第6页浏览型号E0C6S46F的Datasheet PDF文件第7页 
E0C6S46  
BASIC EXTERNAL CONNECTION DIAGRAM  
LCD PANEL 40 × 16  
SIN  
SERIAL  
DEVICE  
SOUT  
SCLK  
R00–R03  
R10–R13  
R20–R23  
R30–R33  
R40  
P00–P03  
P10–P13  
P20–P23  
P30–P33  
OUTPUT  
DATA  
I/O  
DATA  
R41  
E0C6S46  
FOUT  
Buzzer  
R42  
R43  
[The potential of the substrate  
(back of the chip) is VDD.]  
K00–K03  
K10–K13  
INPUT  
DATA  
N.C.  
V
REF  
VSS  
RESET  
TEST  
+
V
DD  
Rfc  
Rfx  
C3  
C2  
C1  
C7  
C6  
C5 C4 C8  
Ceramic  
X'tal  
CDC  
CGC  
CGX  
POWER  
3–5 V  
RCR2  
Mask option  
X'tal  
Rfx  
Crystal oscillator 32.768 kHz, C  
Feedback resistor 10 MΩ  
Trimmer capacitor 5–25 pF  
I
(Max)=35 kΩ  
C1  
C2  
C3  
C4  
C5  
C6  
C7  
C8  
Booster capacitor (1)  
Booster capacitor (2)  
Booster capacitor (3)  
Capacitor between VDD and VL1 0.1µF  
Capacitor between VDD and VL2 0.1µF  
Capacitor between VDD and VL4 0.1µF  
Capacitor between VDD and VL5 0.1µF  
Capacitor between VDD and VS1 0.1µF  
0.1µF  
0.1µF  
0.1µF  
1
1
1
1
1
1
1
1 When the load on the liquid crystal  
system is large, increase the capaci-  
tance of the voltage booster capacitors  
(C1–C3) and the capacitors between  
VDD and liquid crystal system power  
(C4–C7).  
CGX  
Ceramic Ceramic oscillator 500 kHz–2 MHz  
Rfc Feedback resistor 1 MΩ  
CGC  
Gate capacitor  
Drain capacitor  
100 pF  
100 pF  
CDC  
(RCR2  
)
Resistor for OSC3 20 k–100 k(VSC=2)  
CR oscillation 40 k–100 k(VSC=1)  
Note: The above table is simply an example, and is not guaranteed to work.  
NOTICE:  
No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko  
Epson reserves the right to make changes to this material without notice. Seiko Epson does not assume any liability of any kind arising out of  
any inaccuracies contained in this material or due to its application or use in any product or circuit and, further, there is no representation that  
this material is applicable to products requiring high level reliability, such as, medical products. Moreover, no license to any intellectual  
property rights is granted by implication or otherwise, and there is no representation or warranty that anything made in accordance with this  
material will be free from any patent or copyright infringement of a third party. This material or portions thereof may contain technology or the  
subject relating to strategic products under the control of the Foreign Exchange and Foreign Trade Control Law of Japan and may require an  
export license from the Ministry of International Trade and Industry or other approval from another government agency.  
© Seiko Epson Corporation 1999 All right reserved.  
SEIKO EPSON CORPORATION  
ELECTRONIC DEVICES MARKETING DIVISION  
IC Marketing & Engineering Group  
ED International Marketing Department I (Europe & U.S.A.)  
421-8, Hino, Hino-shi, Tokyo 191-8501, JAPAN  
Phone : 042-587-5812 FAX : 042-587-5564  
ED International Marketing Department II (Asia)  
421-8, Hino, Hino-shi, Tokyo 191-8501, JAPAN  
Phone : 042-587-5814 FAX : 042-587-5110  

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