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DS87C550-QNL PDF预览

DS87C550-QNL

更新时间: 2024-01-17 05:54:18
品牌 Logo 应用领域
达拉斯 - DALLAS 微控制器和处理器外围集成电路可编程只读存储器电动程控只读存储器时钟
页数 文件大小 规格书
50页 763K
描述
EPROM High-Speed Micro with A/D and PWM

DS87C550-QNL 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:LCC包装说明:QCCJ, LDCC68,1.0SQ
针数:68Reach Compliance Code:not_compliant
ECCN代码:3A991.A.2HTS代码:8542.31.00.01
风险等级:5.76Is Samacsys:N
具有ADC:YES地址总线宽度:16
位大小:8CPU系列:8051
最大时钟频率:33 MHzDAC 通道:NO
DMA 通道:NO外部数据总线宽度:8
JESD-30 代码:S-PQCC-J68JESD-609代码:e0
长度:24.23 mm湿度敏感等级:3
I/O 线路数量:56端子数量:68
最高工作温度:85 °C最低工作温度:-40 °C
PWM 通道:YES封装主体材料:PLASTIC/EPOXY
封装代码:QCCJ封装等效代码:LDCC68,1.0SQ
封装形状:SQUARE封装形式:CHIP CARRIER
峰值回流温度(摄氏度):240电源:5 V
认证状态:Not QualifiedRAM(字节):1280
ROM(单词):8192ROM可编程性:OTPROM
座面最大高度:4.57 mm速度:33 MHz
子类别:Microcontrollers最大供电电压:5.5 V
最小供电电压:4.5 V标称供电电压:5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:J BEND端子节距:1.27 mm
端子位置:QUAD处于峰值回流温度下的最长时间:20
宽度:24.23 mmuPs/uCs/外围集成电路类型:MICROCONTROLLER
Base Number Matches:1

DS87C550-QNL 数据手册

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DS87C550  
PLCC/  
CLCC  
1,  
QFP  
64-71  
SIGNAL NAME DESCRIPTION  
P5.0-P5.7  
Port 5 - I/O. Port 5 functions as an open-drain 8-bit bi-directional I/O port or  
alternately as an interface to the A/D converter. When used for general purpose  
I/O, these pins operate in a quasi-bi-directional mode. Writing a logic 1 to these  
pins (reset condition) will cause them to tri-state. This allows the pins to serve as  
inputs since the tri-state condition can be driven by an external device. If a logic 0  
is written to a pin, it is pulled down internally and therefore serves as an output  
pin containing a logic 0. Because these pins are open-drain, external pullup  
resistors are required to create a logic 1 level when they are used as outputs. As  
an alternate function Port 5 pins operate as the analog inputs for the A/D  
converter as described below.  
62-68  
Port Alternate Mode  
1
71  
70  
69  
68  
67  
66  
65  
64  
P5.0 ADC0  
P5.1 ADC1  
P5.2 ADC2  
P5.3 ADC3  
P5.4 ADC4  
P5.5 ADC5  
P5.6 ADC6  
P5.7 ADC7  
Analog to Digital Converter input channel 0  
Analog to Digital Converter input channel 1  
Analog to Digital Converter input channel 2  
Analog to Digital Converter input channel 3  
Analog to Digital Converter input channel 4  
Analog to Digital Converter input channel 5  
Analog to Digital Converter input channel 6  
Analog to Digital Converter input channel 7  
68  
67  
66  
65  
64  
63  
62  
3-6, 32 28, 29  
P6.0-P6.5  
P6.7  
Port 6 - I/O. Port 6 functions as an 6-bit bi-directional I/O port or alternately as  
an interface to the PWM and A/D on-board peripherals. As an I/O port, these pins  
operate as described in Port 1. The alternate modes of Port 6 are detailed below.  
33, 38  
37  
74-77  
Port Alternate Function  
4
5
32  
33  
6
38  
3
59  
75  
76  
28  
29  
77  
37  
74  
60  
P6.0 PWMO0 PWM channel 0 output  
P6.1 PWMO1 PWM channel 1 output  
P6.2 PWMO2 PWM channel 2 output  
P6.3 PWMO3 PWM channel 3 output  
P6.4 PWMC0 PWM0 clock input  
P6.5 PWMC1 PWM1 clock input  
P6.7 STADC  
External A/D conversion start signal (active low)  
Avref+  
A/D +Reference - Input. When selected, supplies the positive reference voltage  
for the A/D converter. This signal should be isolated from digital VCC to prevent  
noise from affecting A/D measurements.  
58  
59  
Avref-  
A/D -Reference - Input. When selected, supplies the negative reference voltage  
for the A/D converter. This signal should be isolated from digital GND to prevent  
noise from affecting A/D measurements.  
61  
60  
63  
61  
AVCC  
AVSS  
NC  
Analog VCC  
Analog Ground  
3, 21  
22, 30  
33, 36  
43, 44  
62, 73  
78, 79  
NC-Reserved. These pins should not be connected. They are reserved for use  
with future devices in this family.  
6 of 50  

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