Datasheet > DS4432

DS4432

更新时间： 2023-12-20 18:44:53

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
9页	211K
描述
双通道、可通过I2C调节的吸入/源出电流DAC

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DS4432 数据手册

Dual-Channel, I C, 7-Bit Sink/Source

Current DAC

DS432

OUTPUT CURRENT SOURCE CHARACTERISTICS (continued)

= +2.7V to +5.5V, T = -40°C to +85°C.)

PARAMETER

SYMBOL

CONDITIONS

measured at 1.2V

OUT

MIN

TYP

0.41

0.08

0.14

MAX

UNITS

DC source, V

Output Current Variation Due to

Power-Supply Change

%/V

DC sink, V

measured at 1.2V

OUT

DC source, V = 3.3V

Output Current Variation Due to

Output-Voltage Change

%/V

μA

DC sink, V = 3.3V

Output Leakage Current at Zero

Current Setting

-1

ZERO

Output Current Differential

Linearity

DNL

INL

(Notes 6, 7)

(Notes 7, 8)

-0.5

-1

+0.5

LSB

Output Current Integral Linearity

AC ELECTRICAL CHARACTERISTICS

= +2.7V to +5.5V, T = -40°C to +85°C.)

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

SCL Clock Frequency

(Note 9)

400

kHz

SCL

Bus Free Time Between STOP

and START Conditions

1.3

0.6

μs

BUF

Hold Time (Repeated) START

Condition

HD:STA

Low Period of SCL

High Period of SCL

Data Hold Time

1.3

0.6

μs

LOW

HIGH

0.9

HD:DAT

SU:DAT

SU:STA

Data Setup Time

100

START Setup Time

SDA and SCL Rise Time

SDA and SCL Fall Time

STOP Setup Time

0.6

(Note 10)

20 + 0.1C

0.6

300

SU:STO

SDA and SCL Capacitive

(Note 10)

400

Note 1: All voltages with respect to ground. Currents entering the IC are specified positive, and currents exiting the IC are negative.

Note 2: Input resistors (R ) must be between the specified values to ensure the device meets its accuracy and linearity specifications.

Note 3: Supply current specified with all outputs set to zero current setting. SDA and SCL are connected to V . Excludes current

through R resistors (I

). Total current including I

is I + (2 x I

RFS

Note 4: The output voltage range must be satisfied to ensure the device meets its accuracy and linearity specifications.

Note 5: Temperature drift excludes drift caused by external resistor.

Note 6: Differential linearity is defined as the difference between the expected incremental current increase with respect to position

and the actual increase. The expected incremental increase is the full-scale range divided by 127.

Note 7: Guaranteed by design.

Note 8: Integral linearity is defined as the difference between the expected value as a function of the setting and the actual value.

The expected value is a straight line between the zero and the full-scale values proportional to the setting.

Note 9: Timing shown is for fast-mode (400kHz) operation. This device is also backward compatible with I C standard-mode timing.

Note 10: C —total capacitance of one bus line in pF.

_______________________________________________________________________________________

1 234 5 6 7...9

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