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DS26F32MWF-QML PDF预览

DS26F32MWF-QML

更新时间： 2024-09-28 13:07:27
品牌 Logo 应用领域
美国国家半导体 - NSC /
页数 文件大小 规格书
6页 136K
描述
IC QUAD LINE RECEIVER, CDFP16, CERPACK-16, Line Driver or Receiver

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中文翻译

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DS26F32MWF-QML 技术参数

生命周期：Obsolete包装说明：DFP,
Reach Compliance Code：unknownECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.16
输入特性：DIFFERENTIAL SCHMITT TRIGGER接口集成电路类型：LINE RECEIVER
接口标准：EIA-422; EIA-423; FED STD 1020; FED STD 1030JESD-30 代码：R-GDFP-F16
功能数量：4端子数量：16
最高工作温度：125 °C最低工作温度：-55 °C
封装主体材料：CERAMIC, GLASS-SEALED封装代码：DFP
封装形状：RECTANGULAR封装形式：FLATPACK
认证状态：Not Qualified最大接收延迟：31 ns
接收器位数：4筛选级别：MIL-STD-883
座面最大高度：2.032 mm最大供电电压：5.5 V
最小供电电压：4.5 V标称供电电压：5 V
表面贴装：YES技术：BIPOLAR
温度等级：MILITARY端子形式：FLAT
端子节距：1.27 mm端子位置：DUAL
宽度：6.35 mmBase Number Matches：1

DS26F32MWF-QML 数据手册

 浏览型号DS26F32MWF-QML的Datasheet PDF文件第2页浏览型号DS26F32MWF-QML的Datasheet PDF文件第3页浏览型号DS26F32MWF-QML的Datasheet PDF文件第4页浏览型号DS26F32MWF-QML的Datasheet PDF文件第5页浏览型号DS26F32MWF-QML的Datasheet PDF文件第6页 
January 1996  
DS26F32C/DS26F32M  
Quad Differential Line Receiver  
General Description  
Features  
Y
Military temperature range  
The DS26F32 is a quad differential line receiver designed to  
meet the requirements of EIA Standards RS-422 and RS-  
423, and Federal Standards 1020 and 1030 for balanced  
and unbalanced digital data transmission.  
Y
g
Input voltage range of  
7.0V (differential or common  
g
mode) 0.2V sensitivity over the input voltage range  
Meets all the requirements of EIA standards RS-422  
and RS-423  
Y
The DS26F32 offers improved performance due to the use  
of state-of-the-art L-FAST bipolar technology. The L-FAST  
technology allows for higher speeds and lower currents by  
utilizing extremely short gate delay times. Thus, the  
DS26F32 features lower power, extended temperature  
range, and improved specifications.  
Y
Y
Y
Y
High input impedance (18k typical)  
30 mV input hysteresis  
a
Operation from single 5.0V supply  
Input pull-down resistor prevents output oscillation on  
unused channels  
The device features an input sensitivity of 200 mV over the  
g
input common mode range of 7.0V. The DS26F32 pro-  
vides an enable function common to all four receivers and  
Y
Y
TRI-STATE outputs, with choice of complementary en-  
ables, for receiving directly onto a data bus  
Propagation delay 15 ns typical  
TRI-STATE outputs with 8.0 mA sink capability. Also, a  
É
fail-safe input/output relationship keeps the outputs high  
when the inputs are open.  
The DS26F32 offers optimum performance when used with  
the DS26F31 Quad Differential Line Driver.  
Connection Diagrams  
16-Lead DIP  
20-Lead Ceramic Leadless Chip Carrier  
TL/F/9615–7  
Function Table (Each Receiver)  
Differential Inputs  
Enables  
Outputs  
e
a
b
b
(V )  
IN  
V
ID  
(V  
)
E
E
OUT  
IN  
t
V
ID  
0.2V  
H
X
X
L
H
H
TL/F/9615–1  
Top View  
s
b
V
ID  
0.2V  
H
X
X
L
L
L
Order Number DS26F32CJ or DS26F32MJ  
See NS Package Number J16A  
X
L
H
Z
For Complete Military 883 Specifications,  
see RETS Datasheet.  
e
e
e
H
L
High Level  
Low Level  
Immaterial  
Order Number DS26F32ME/883,  
DS26F32MJ/883 or DS26F32MW/883  
See NS Package Number E20A, J16A or W16A  
X
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.  
C
1996 National Semiconductor Corporation  
TL/F/9615  
RRD-B30M36/Printed in U. S. A.  
http://www.national.com  
123456

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