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DS18S20-PAR PDF预览

DS18S20-PAR

更新时间: 2023-12-20 18:44:36
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
20页 250K
描述
寄生供电数字温度计

DS18S20-PAR 数据手册

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DS18S20-PAR  
DETAILED PIN DESCRIPTIONS Table 1  
PIN  
1
SYMBOL  
GND  
DESCRIPTION  
Ground.  
2
DQ  
Data Input/Output pin. Open-drain 1-Wire interface pin. Also provides power  
to the device when used in parasite power mode (see “Parasite Power” section.)  
3
NC  
No Connect. Doesn’t connect to internal circuit.  
OVERVIEW  
The DS18S20-PAR uses Dallas’ exclusive 1-Wire bus protocol that implements bus communication  
using one control signal. The control line requires a weak pullup resistor since all devices are linked to  
the bus via a 3-state or open-drain port (the DQ pin in the case of the DS18S20-PAR). In this bus system,  
the microprocessor (the master device) identifies and addresses devices on the bus using each device’s  
unique 64-bit code. Because each device has a unique code, the number of devices that can be addressed  
on one bus is virtually unlimited. The 1-Wire bus protocol, including detailed explanations of the  
commands and “time slots,” is covered in the 1-WIRE BUS SYSTEM section of this datasheet.  
An important feature of the DS18S20-PAR is its ability to operate without an external power supply.  
Power is instead supplied through the 1-Wire pullup resistor via the DQ pin when the bus is high. The  
high bus signal also charges an internal capacitor (CPP), which then supplies power to the device when the  
bus is low. This method of deriving power from the 1-Wire bus is referred to as “parasite power.”  
Figure 1 shows a block diagram of the DS18S20-PAR, and pin descriptions are given in Table 1. The  
64-bit ROM stores the device’s unique serial code. The scratchpad memory contains the 2-byte  
temperature register that stores the digital output from the temperature sensor. In addition, the scratchpad  
provides access to the 1-byte upper and lower alarm trigger registers (TH and TL). The TH and TL  
registers are nonvolatile (EEPROM), so they will retain their data when the device is powered down.  
DS18S20-PAR BLOCK DIAGRAM Figure 1  
VPU  
PARASITE POWER  
CIRCUIT  
4.7K  
MEMORY CONTROL  
LOGIC  
DS18S20-PAR  
DQ  
TEMPERATURE SENSOR  
64-BIT ROM  
AND  
INTERNAL VDD  
1-wire PORT  
ALARM HIGH TRIGGER (TH)  
REGISTER (EEPROM)  
SCRATCHPAD  
CPP  
ALARM LOW TRIGGER (TL)  
REGISTER (EEPROM)  
GND  
8-BIT CRC GENERATOR  
2 of 20  

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