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DS18S20-PAR PDF预览

DS18S20-PAR

更新时间: 2023-12-20 18:44:36
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
20页 250K
描述
寄生供电数字温度计

DS18S20-PAR 数据手册

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DS18S20-PAR  
1-WIRE BUS SYSTEM  
The 1-Wire bus system uses a single bus master to control one or more slave devices. The DS18S20-  
PAR is always a slave. When there is only one slave on the bus, the system is referred to as a “single-  
drop” system; the system is “multi-drop” if there are multiple slaves on the bus. All data and commands  
are transmitted least significant bit first over the 1-Wire bus.  
The following discussion of the 1-Wire bus system is broken down into three topics: hardware  
configuration, transaction sequence, and 1-Wire signaling (signal types and timing).  
HARDWARE CONFIGURATION  
The 1-Wire bus has by definition only a single data line. Each device (master or slave) interfaces to the  
data line via an open drain or 3–state port. This allows each device to “release” the data line when the  
device is not transmitting data so the bus is available for use by another device. The 1-Wire port of the  
DS18S20-PAR (the DQ pin) is open drain with an internal circuit equivalent to that shown in Figure 8.  
The 1-Wire bus requires an external pullup resistor of approximately 5 k; thus, the idle state for the 1-  
Wire bus is high. If for any reason a transaction needs to be suspended, the bus MUST be left in the idle  
state if the transaction is to resume. Infinite recovery time can occur between bits so long as the 1-Wire  
bus is in the inactive (high) state during the recovery period. If the bus is held low for more than 480 s,  
all components on the bus will be reset. In addition, to assure that the DS18S20-PAR has sufficient  
supply current during temperature conversions, it is necessary to provide a strong pullup (such as a  
MOSFET) on the 1-Wire bus whenever temperature conversions or EEPROM writes are taking place (as  
described in the PARASITE POWER section).  
HARDWARE CONFIGURATION Figure 8  
VPU  
VPU  
Micro-  
DS18S20-PAR 1-WIRE PORT  
Strong  
Pullup  
processor  
4.7K  
DQ  
Pin  
RX  
1-wire bus  
RX  
5 µA  
Typ.  
TX  
TX  
100  
MOSFET  
RX = RECEIVE  
TX = TRANSMIT  
TRANSACTION SEQUENCE  
The transaction sequence for accessing the DS18S20-PAR is as follows:  
Step 1. Initialization  
Step 2. ROM Command (followed by any required data exchange)  
Step 3. DS18S20-PAR Function Command (followed by any required data exchange)  
7 of 20  

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