DS1775
Thermometer Resolution Configuration Table 5
R1
0
R0
0
Thermometer Resolution
Max Conversion Time
9-bit
10-bit
11-bit
12-bit
0.15s
0.3s
0.6s
1.2s
0
1
1
0
1
1
Thermostat Setpoints Programming
The thermostat registers (TOS and THYST) can be programmed or read via the 2–wire interface. TOS is
accessed by setting the DS1775 data pointer to the 03h location, and to the 02h location for THYST
.
The format of the TOS and THYST registers is identical to that of the Thermometer register; that is, 12–bit
2’s complement representation of the temperature in °C. The user can program the number of bits (9, 10,
11, or 12) for each TOS and THYST that corresponds to the thermometer resolution mode chosen. For
example, if the 9–bit mode is chosen the 3 least significant bits of TOS and THYST will be ignored by the
thermostat comparator. The format for both TOS and THYST is shown in Table 6. The power–up default
for TOS is 80°C and for THYST is 75°C.
Thermostat Setpoint (TOS/THYST) Format Table 6
S
26
25
24
23
22
21
0
20
LSb
0
MSB
LSB
MSb
2-1
(UNIT = °C)
2-2
2-3
2-4
0
0
TEMPERATURE/DATA RELATIONSHIPS
TEMP
DIGITAL OUTPUT
(Binary)
DIGITAL OUTPUT (Hex)
0101 0000 0000 0000
0100 1011 0000 0000
0000 1010 0010 0000
0000 0000 1000 0000
0000 0000 0000 0000
1111 1111 1000 0000
1111 0101 1110 0000
1110 0110 1111 0000
1100 1001 0000 0000
5000h
4B00h
0A20h
0080h
0000h
FF80h
F5E0h
E6F0h
C900h
+80°C
+75°C
+10.125°C
+0.5°C
+0°C
-0.5°C
-10.125°C
-25.0625°C
-55°C
If the user does not wish to take advantage of the thermostat capabilities of the DS1775, the 24 bits can be
used for general storage of system data that need not be maintained following a power loss.
2–WIRE SERIAL DATA BUS
The DS1775 supports a bi–directional 2-wire bus and data transmission protocol. A device that sends data
onto the bus is defined as a transmitter, and a device receiving data as a receiver. The device that controls
the message is called a “master”. The devices that are controlled by the master are “slaves”. The bus must
be controlled by a master device which generates the serial clock (SCL), controls the bus access, and
generates the START and STOP conditions. The DS1775 operates as a slave on the two–wire bus.
Connections to the bus are made via the open–drain I/O lines SDA and SCL.
The following bus protocol has been defined (See Figure 4):
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