DP8406QV

更新时间： 2024-01-05 15:02:30

品牌	Logo	应用领域
美国国家半导体 - NSC		运算电路逻辑集成电路
页数	文件大小	规格书
14页	226K
描述
32-Bit Parallel Error Detection and Correction Circuit

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技术参数
数据手册

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DP8406QV 技术参数

生命周期：	Obsolete	包装说明：	QCCJ,
Reach Compliance Code：	unknown	HTS代码：	8542.39.00.01
风险等级：	5.84	其他特性：	BYTE CONTROL
系列：	84	JESD-30 代码：	S-PQCC-J68
长度：	24.13 mm	负载电容（CL）：	50 pF
逻辑集成电路类型：	ERROR DETECTION AND CORRECTION CIRCUIT	位数：	32
功能数量：	1	端子数量：	68
最高工作温度：	70 °C	最低工作温度：
输出特性：	3-STATE	封装主体材料：	PLASTIC/EPOXY
封装代码：	QCCJ	封装形状：	SQUARE
封装形式：	CHIP CARRIER	最大电源电流（ICC）：	340 mA
传播延迟（tpd）：	28 ns	认证状态：	Not Qualified
座面最大高度：	5.08 mm	最大供电电压 (Vsup)：	5.5 V
最小供电电压 (Vsup)：	4.5 V	标称供电电压 (Vsup)：	5 V
表面贴装：	YES	技术：	TTL
温度等级：	COMMERCIAL	端子形式：	J BEND
端子节距：	1.27 mm	端子位置：	QUAD
宽度：	24.13 mm	Base Number Matches：	1

DP8406QV 数据手册

May 1991

DP8406 (54F/74F632)

32-Bit Parallel Error Detection and Correction Circuit

General Description

The DP8406 device is a 32-bit parallel error detection and

correction circuit (EDAC) in a 52-pin or 68-pin package. The

EDAC uses a modified Hamming code to generate a 7-bit

check word from a 32-bit data word. This check word is

stored along with the data word during the memory write

cycle. During the memory read cycle, the 39-bit words from

memory are processed by the EDAC to determine if errors

have occurred in memory.

detected. Otherwise, errors in three or more bits of the

39-bit word are beyond the capabilities of these devices to

detect.

Read-modify-write (byte-control) operations can be per-

formed by using output latch enable, LEDBO, and the indi-

vidual OEB through OEB byte control pins.

Diagnostics are performed on the EDACs by controls and

internal paths that allow the user to read the contents of the

Data Bit and Check Bit input latches. These will determine if

the failure occurred in memory or in the EDAC.

Single-bit errors in the 32-bit data word are flagged and cor-

rected.

Single-bit errors in the 7-bit check word are flagged, and the

CPU sends the EDAC through the correction cycle even

though the 32-bit data word is not in error. The correction

cycle will simply pass along the original 32-bit data word in

this case and produce error syndrome bits to pinpoint the

error-generating location.

Features

Detects and corrects single-bit errors

Detects and flags dual-bit errors

Built-in diagnostic capability

Fast write and read cycle processing times

Dual-bit errors are flagged but not corrected. These errors

may occur in any two bits of the 39-bit word from memory

(two errors in the 32-bit data word, two errors in the 7-bit

check word, or one error in each word). The gross-error

condition of all LOWs or all HIGHs from memory will be

Byte-write capability

Guaranteed 4000V minimum ESD protection

Fully pin and function compatible with TI’s

SN74ALS632A thru SN74ALS635 series

Simplified Functional Block

TL/F/9579–9

Device

DP8406

Package

52-Pin

Byte-Write

Output

TRI-STATE

yes

68-Pin

FASTÉ and TRI-STATEÉ are registered trademarks of National Semiconductor Corporation.

1995 National Semiconductor Corporation

TL/F/9579

RRD-B30M105/Printed in U. S. A.

12 3 4 5 6 7...14

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与DP8406QV相关器件

型号	品牌	描述	获取价格	数据表
DP8406QV(74F632QC)	NSC	32-Bit Parallel Error Detection and Correction Circuit	获取价格
DP8406QVX	TI	84 SERIES, 32-BIT ERROR DETECT AND CORRECT CKT, PQCC52, PLASTIC, CC-52	获取价格
DP8406V	NSC	32-Bit Parallel Error Detection and Correction Circuit	获取价格
DP8406V	TI	84 SERIES, 32-BIT ERROR DETECT AND CORRECT CKT, PQCC68, PLASTIC, LCC-68	获取价格
DP8406V(74F632VC)	NSC	32-Bit Parallel Error Detection and Correction Circuit	获取价格
DP8406VX	TI	84 SERIES, 32-BIT ERROR DETECT AND CORRECT CKT, PQCC68, PLASTIC, LCC-68	获取价格

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