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DP83910A PDF预览

DP83910A

更新时间: 2022-10-12 16:28:45
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德州仪器 - TI /
页数 文件大小 规格书
14页 262K
描述
DP83910A CMOS SNI Serial Network Interface

DP83910A 数据手册

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6.0 Pin Descriptions  
24-Pin DIP  
28-Pin PCC  
Name  
I/O  
Description  
1
1
COL  
O
COLLISION DETECT OUTPUT: Generates an active high signal when  
10 MHz collision signal is detected.  
2
3
2
3
RXD  
CRS  
O
O
RECEIVE DATA OUTPUT: NRZ data output from the PLL. This signal  
must be sampled on the rising edge of receive clock.  
CARRIER SENSE: Asserted on the first valid high-to-low transition on  
g
the RX pair. Remains active until 1.5 bit times after the last bit in  
data.  
4
5
4
5
RXC  
SEL  
O
I
RECEIVE CLOCK: The receive clock from the Manchester data after  
the PLL has locked. Remains active 5 bit times after deasserting CRS.  
a
b
MODE SELECT: When high, transmit and transmit are the same  
voltage in the idle state. When low, transmit is positive with respect  
a
b
to transmit in the idle state, at the transformer’s primary.  
6
7
8
9
V
SS  
V
SS  
V
SS  
GROUND PIN  
7
8
9
10  
11  
12  
LBK  
X1  
I
I
LOOPBACK: When high, the loopback mode is enabled.  
CRYSTAL OR EXTERNAL OSCILLATOR INPUT  
X2  
O
CRYSTAL FEEDBACK OUTPUT: Used in crystal connections only.  
Connected to ground when using an external oscillator.  
10  
13  
TXD  
I
TRANSMIT DATA INPUT: NRZ data input from the controller. The  
data is combined with the transmit clock to produce Manchester data.  
TXD is sampled on the rising edge of transmit clock.  
11  
12  
14  
15  
TXC  
TXE  
O
I
TRANSMIT CLOCK: The 10 MHz clock derived from the 20 MHz  
oscillator.  
TRANSMIT ENABLE: The encoder begins operation when this input is  
asserted high.  
b
a
13  
14  
16  
17  
TX  
TX  
O
TRANSMIT OUTPUT: Differential line driver which sends the encoded  
data to the transceiver. The outputs are source followers which require  
270X pull-down resistors.  
15  
6
NC  
NO CONNECTION: This may be tied to V for the PLCC version to be  
SS  
compatible with the DP8391.  
16  
17  
18  
19  
NC  
NO CONNECTION  
TEST  
I
FACTORY TEST INPUT: Used to check the chip’s internal functions.  
May be tied low or have a 0.01 mf bypass capacitor to ground (for  
compatibility with the bipolar DP8391) during normal operation.  
18  
19  
20  
21  
22  
23  
V
DD  
V
DD  
V
DD  
V
DD  
POWER CONNECTION  
20  
24  
NC  
NO CONNECTION  
b
21  
22  
25  
26  
RX  
I
I
RECEIVE INPUT: Differential receive input pair from the transceiver.  
a
RX  
b
a
23  
24  
27  
28  
CD  
CD  
COLLISION INPUT: Differential collision pair input from the  
transceiver.  
5

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