Table of Contents
1.0 General Description ......................................................................................................................... 1
2.0 Applications .................................................................................................................................... 1
3.0 Features ........................................................................................................................................ 1
4.0 System Diagram .............................................................................................................................. 1
4.0 Block Diagram ................................................................................................................................ 2
6.0 Pin Layout ...................................................................................................................................... 6
7.0 Pin Descriptions .............................................................................................................................. 7
7.1 SERIAL MANAGEMENT INTERFACE ........................................................................................ 7
7.2 MAC DATA INTERFACE ........................................................................................................... 7
7.3 CLOCK INTERFACE ................................................................................................................ 8
7.4 LED INTERFACE ..................................................................................................................... 9
7.5 RESET ................................................................................................................................... 9
7.6 STRAP OPTIONS .................................................................................................................. 10
7.7 10 Mb/s AND 100 Mb/s PMD INTERFACE ................................................................................ 11
7.8 SPECIAL CONNECTIONS ...................................................................................................... 11
7.9 POWER SUPPLY PINS .......................................................................................................... 11
7.10 PACKAGE PIN ASSIGNMENTS ............................................................................................. 12
8.0 Configuration ................................................................................................................................ 13
8.1 AUTO-NEGOTIATION ............................................................................................................ 13
8.1.1 Auto-Negotiation Pin Control .......................................................................................... 13
8.1.2 Auto-Negotiation Register Control ................................................................................... 13
8.1.3 Auto-Negotiation Parallel Detection ................................................................................. 13
8.1.4 Auto-Negotiation Restart ............................................................................................... 14
8.1.5 Enabling Auto-Negotiation via Software ........................................................................... 14
8.1.6 Auto-Negotiation Complete Time .................................................................................... 14
8.2 AUTO-MDIX .......................................................................................................................... 14
8.3 PHY ADDRESS ..................................................................................................................... 14
8.3.1 MII Isolate Mode ........................................................................................................... 14
8.4 LED INTERFACE ................................................................................................................... 15
8.4.1 LEDs .......................................................................................................................... 15
8.4.2 LED Direct Control ........................................................................................................ 16
8.5 HALF DUPLEX vs. FULL DUPLEX ........................................................................................... 16
8.6 INTERNAL LOOPBACK .......................................................................................................... 16
8.7 BIST ..................................................................................................................................... 16
9.0 Functional Description .................................................................................................................... 17
9.1 MII INTERFACE ..................................................................................................................... 17
9.1.1 Nibble-wide MII Data Interface ....................................................................................... 17
9.1.2 Collision Detect ............................................................................................................ 17
9.1.3 Carrier Sense .............................................................................................................. 17
9.2 REDUCED MII INTERFACE .................................................................................................... 17
9.3 802.3u MII SERIAL MANAGEMENT INTERFACE ...................................................................... 18
9.3.1 Serial Management Register Access ............................................................................... 18
9.3.2 Serial Management Access Protocol ............................................................................... 18
9.3.3 Serial Management Preamble Suppression ...................................................................... 19
10.0 Architecture ................................................................................................................................ 20
10.1 100BASE-TX TRANSMITTER ................................................................................................ 20
10.1.1 Code-group Encoding and Injection ............................................................................... 21
10.1.2 Scrambler .................................................................................................................. 21
10.1.3 NRZ to NRZI Encoder ................................................................................................. 22
10.1.4 Binary to MLT-3 Convertor ........................................................................................... 22
10.2 100BASE-TX RECEIVER ...................................................................................................... 22
10.2.1 Analog Front End ........................................................................................................ 22
10.2.2 Digital Signal Processor ............................................................................................... 22
10.2.2.1 Digital Adaptive Equalization and Gain Control ..................................................... 23
10.2.2.2 Base Line Wander Compensation ....................................................................... 24
10.2.3 Signal Detect ............................................................................................................. 25
10.2.4 MLT-3 to NRZI Decoder .............................................................................................. 25
10.2.5 NRZI to NRZ .............................................................................................................. 25
10.2.6 Serial to Parallel ......................................................................................................... 25
10.2.7 Descrambler .............................................................................................................. 25
10.2.8 Code-group Alignment ................................................................................................ 25
10.2.9 4B/5B Decoder ........................................................................................................... 25
10.2.10 100BASE-TX Link Integrity Monitor ............................................................................. 25
10.2.11 Bad SSD Detection ................................................................................................... 25
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