Quad SPST CMOS Analog Switches
ELECTRICAL CHARACTERISTICS (DG202)
(5+ = +1ꢀ5, 5- = -1ꢀ5, GND = 0, T = full ꢀꢃeartꢄng temꢃerature range, unless otherwise noted.) (For more information on TYP
A
values see Note 3.)
DG202A
DG202C, D, E
TYP MAX
PARAMETER
SWITCH
SYMBVL
CVNDITIVNS
UNITS
MIN
TYP MAX MIN
Analog Signal Range
5
-1ꢀ
+1ꢀ
2ꢀ0
100
-1ꢀ
+1ꢀ
2ꢀ0
100
5
ANALOG
Drain-Source ON Resistance
(Note ꢀ)
R
5
5
5
5
= ±105, 5 = 2.±5, I = 1mA
Ω
DS (ON)
S (OFF)
D (OFF)
D
IN
S
5 = 1±5, 5 = -1±5
S
D
Source OFF-Leakage Current
Drain OFF-Leakage Current
I
= 0.ꢁ5
= 0.ꢁ5
= 2.±5
IN
IN
IN
5 = -1±5, 5 = 1±5
-100
-100
-200
-1.0
-100
-100
-200
-1.0
S
D
5 = 1±5, 5 = -1±5
100
200
100
200
S
D
I
nA
µA
5 = -1±5, 5 = 1±5
S
D
5 = -1±5
S
Drain ON-Leakage Current
(Note 6)
I
D (ON)
5
= 1±5
D
INPUT
5
= 2.±5
= 1ꢀ5
IN
IN
Input Current with Input
5oltage High
I
INH
5
1.0
1.0
Input Current with Input
5oltage Low
I
5
= 0
-1.0
-1.0
INL
IN
Nꢀte .: Electrical characteristics, such as On-Resistance, will change when power supplies other than ±1ꢀ5, are used.
Nꢀte 6: I
is leakage from driver into “ON” switch.
D (ON)
Pin Description
PIN
NAME
FUNCTIVN
DIP/SV/TSSVP
QFN/TQFN
1, 16, 9, ꢁ
1ꢀ, 1±, 7, 6
IN1–IN±
D1–D±
S1–S±
5-
Input
2, 1ꢀ, 10, 7
16, 13, ꢁ, ꢀ
Analog Switch Drain Terminal
Analog Switch Source Terminal
Negative-Supply 5oltage Input
Ground
3, 1±, 11, 6
1, 12, 9, ±
±
2
3
ꢀ
GND
N.C.
5+
12
13
—
10
11
EP
No Connection
Positive-Supply 5oltage Input—Connected to Substrate
Eꢂposed Pad. Connect eꢂposed pad to 5+ or leave EP unconnected.
EP
Switching Time Test Circuit
Protecting Against Fault
Conditions
Fault conditions occur when power supplies are turned
off when input signals are still present, or when over-
voltages occur at the inputs during normal operation. In
either case, source-to-body diodes can be forward
biased and conduct current from the signal source. If
Switch output waveform shown for 5 = constant with
S
logic input waveform as shown. Note that 5 may be
S
+ve or -ve as per switching times test circuit. 5 is the
O
steady state output with switch on. Feedthrough via
gate capacitance may result in spikes at leading and
trailing edge of output waveform.
_______________________________________________________________________________________
.