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DESIGNING

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Designing with 10K and 100K ECL / PECL Devices (39k)

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DESIGNING 数据手册

AN1006

Designing with 10K and 100K

ECL / PECL Devices

HIGH-PERFORMANCE PRODUCTS

10K/100K ECL/PECL Devices

Designing with 10K and 100K ECL / PECL Devices

100K ECL Driving 10K ECL

The basic differences between 10K and 100K de-

vices are circuit stability and performance with varia-

tion in supply voltage and ambient temperature.

100K ECL parts are both temperature and voltage

compensated and 10K ECL parts are only voltage

compensated.

-0.9

-1.0

-1.1

100K V

(min)

HIGH STATE MARGINS

10K

100K

(min)

-1.2

-1.3

-1.4

ECL is used to obtain the required circuit speed and

provide the circuit features necessary to optimize

high-speed system design. The problem caused by

mixing 10K ECL and 100K ECL logics is illustrated

in Figures 1 & 2.

(max)

10K V

-1.5

-1.6

LOW STATE MARGINS

100K 10K

100K V (max)

-1.7

- AMBIENT TEMPERATURE ( C)

Figure 2

10K output levels and input threshold vary with tem-

perature, whereas 100K output levels and input

threshold remain essentially constant over supply

voltage and temperature change. This means that

the noise margins vary with the temperature, even

if the temperatures of the driving and receiving cir-

cuits track. Perhaps the worse-case is shown in

Figure 2, which illustrates 100K driving 10K. At T_A

= 75°C, the high margins are seen to be less than

100 mV. Clearly this would not represent accept-

able DC margins in any real systems.

If the use of 10K ECL in a 100K system is unavoid-

able, it is recommended that all interfacing be done

differentially. This is illustrated in Figure 3, which is

applicable in either direction. Also if the operating

ambient temperature for all the ECL devices is un-

der control, this type of connection is allowed. For

ECL/PECL output termination techniques refer to

application note AN1003.

10K ECL Driving 100K ECL

-0.9

in)

10K

-1.0

-1.1

HIGH STATE MARGINS

10K 100K

100K V (min)

-1.2

-1.3

-1.4

Differential Line Receiver

-2V -2V

LOW STATE MARGINS

10K 100K

100K V (max)

Interfacing 10K and 100K

-1.5

-1.6

Figure 3

(max)

10K

-1.7

- AMBIENT TEMPERATURE ( C)

Figure 1

www.semtech.com

Revision 1/November 14, 2001

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