Discoidal MLC
Feed-Through Capacitors and Filters
DC Style (US Preferred Sizes)
APPLICATION INFORMATION ON DISCOIDAL
LOWEST CAPACITANCE IMPEDANCES TO GROUND
A discoidal MLC capacitor has very low impedance associated with its ground path since the signal is
presented with a multi-directional path. These electrode pathsꢁ which can be as many as +00ꢁ allow for low
ESR and ESL which are the major elements in impedance at high frequencies.
The assembled discoidal element or feed-thru allows signal to be fed in through a chassis or bulkheadꢁ
conditioned as it passes through the discoidalꢁ and isolated by the chassis and discoidal from the original
signal. An example of this application would be in an AFT circuit where the AC noise signal would be required
to be stripped from the DC control signal. Other applications include single line EMIꢀRFI suppressionꢁ L-C
filter constructionꢁ and coaxial shield bypass filtering.
The shape of the discoidal lends itself to filter construction. The short length allows compact construction
where L-C construction is desired. The size freedom associated with this element allows almost any insideꢀ
outside diameter combination. By allowing the inside diameter to equal the center insulator diameter of a
OD*
coaxial signal line and special termination techniquesꢁ this device will allow bypass filtering of a floating shield
ID
to ground.
* Discoidal capacitors are available in two (1) temperature coefficients (C0Gꢁ X7R) and a variety of shapes
and sizesꢁ the most standard of which appear on pages +01 and +±.
T Max.
* Custom designed capacitor arrays are available in an unlimited number of configuration with a wide
range of rating voltages (ꢂ0–1000) and temperature coefficients (NPOꢁ BXꢁ BRꢁ X7R) please see page +1+.
For additional information please contact AꢄX.
INSERTION LOSS
These surfaces are metallized
.127 (0.005). minimum wide except
for DC61, DC26 and DC63
where metallized surfaces
0
-10
SINGLE CHIP
-20
AVX’s DC Series 50V, 100V, 200V, C0G
and X7R parts are capable of meeting
are .127 (0.005) maximum.
-30
-40
DISCOIDAL
+
the requirements of MIL-PRF-31033.
*Tol. = .254 (0.010) or 3%, whichever is greater
-
-50
-60
-70
-80
0
100 200 300 400 500 600 700 800 900 1000
f (MHz)
ELECTRICAL SPECIFICATIONS
Temperature Coefficient
Insulation Resistance 125°C (MIL-STD-101 Method ±01)
C0G and X7R: +0K MΩ or +00 MΩ-μFꢁ whichever is less.
Dielectric Withstanding Voltage 25°C (Flash Test)*
C0G and X7R: 1ꢂ05 rated voltage for ꢂ seconds with ꢂ0 mA max
charging current. ꢂ00ꢄ rated units will be tested at 7ꢂ0 ꢄDC
Life Test (+000 hrs)
C0G: A Temperature Coefficient - 0 ±±0 ppmꢀ/Cꢁ -ꢂꢂ/ ꢃ+1ꢂ/C
X7R: C Temperature Coefficient - ±+ꢂ5ꢁ -ꢂꢂ/ to ꢃ+1ꢂ/C
Capacitance Test (MIL-STD-101 Method ±0ꢂ)
C0G: 1ꢂ/Cꢁ +.0±0.1 ꢄrms at +KHzꢁ for ≤+00 pF use + MHz
X7R: 1ꢂ/Cꢁ +.0±0.1 ꢄrms at +KHz
C0G and X7R: 1005 rated voltage at ꢃ+1ꢂ/C
Dissipation Factor 25°C
(ꢂ00 ꢄolt units @ 600 ꢄDC)
Moisture Resistance (MIL-STD-101 Method +06)
C0Gꢁ X7R: Ten cycles with no voltage applied.
Thermal Shock (MIL-STD-101 Method +07ꢁ Condition A)
Immersion Cycling (MIL-STD-101 Method +04ꢁ Condition B)
C0G: 0.+ꢂ5 Max @ 1ꢂ/Cꢁ +.0±0.1 ꢄrms at +KHzꢁ for ≤+00 pF use + MHz
X7R: 1.ꢂ5 Max @ 1ꢂ/Cꢁ +.0±0.1 ꢄrms at +KHz
Insulation Resistance 25°C (MIL-STD-101 Method ±01)
C0G and X7R: +00K MΩ or +000 MΩ-μFꢁ whichever is less.
Not RoHS Compliant
HOW TO ORDER
DC61
5
A
561
K
A
5
1
06
AVX
Voltage Temperature
Capacitance Code
(1 significant digits
ꢃ no. of zeros)
Examples:
+0 pF = +00
+00 pF = +0+
+ꢁ000 pF = +01
11ꢁ000 pF = 11±
110ꢁ000 pF = 114
Capacitance
Tolerance
C0G: J = ±ꢂ5
K = ±+05
M = ±105
X7R: K = ±+05
M = ±105
Test
Termination
Inside
Maximum
Thickness
Style
ꢂ0ꢄ = ꢂ Coefficient
Level
ꢂ = Silver
Diameter
See Pages +00ꢄ = +
++9-+10 100ꢄ = 1
ꢂ00ꢄ = 7
C0G = A
X7R = C
A = Standard (AꢄX Standard) See Pages 04 = +.01 (0.040)
A = Unterminated ++7-++9 06 = +.ꢂ1 (0.060)
7 = SnNi wꢀAμ Sputter
(+00μ inches)
+0 = 1.ꢂ4 (0.+00)
For dimensionsꢁ voltages or values not specifiedꢁ please consult factory.
118
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