DAC124S085

更新时间： 2024-01-16 07:27:34

品牌	Logo	应用领域
美国国家半导体 - NSC		转换器
页数	文件大小	规格书
20页	423K
描述
12-Bit Micro Power QUAD Digital-to-Analog Converter with Rail-to-Rail Output

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技术参数
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DAC124S085 技术参数

是否Rohs认证：	符合	生命周期：	Obsolete
零件包装代码：	SON	包装说明：	HVSON, SOLCC10,.11,20
针数：	10	Reach Compliance Code：	compliant
ECCN代码：	EAR99	HTS代码：	8542.39.00.01
Factory Lead Time：	7 weeks	风险等级：	5.59
最大模拟输出电压：	5.5 V	最小模拟输出电压：
转换器类型：	D/A CONVERTER	输入位码：	BINARY
输入格式：	SERIAL	JESD-30 代码：	S-PDSO-N10
JESD-609代码：	e3	长度：	3 mm
最大线性误差 (EL)：	0.1953%	湿度敏感等级：	1
位数：	12	功能数量：	1
端子数量：	10	最高工作温度：	105 °C
最低工作温度：	-40 °C	封装主体材料：	PLASTIC/EPOXY
封装代码：	HVSON	封装等效代码：	SOLCC10,.11,20
封装形状：	SQUARE	封装形式：	SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度（摄氏度）：	260	电源：	3/5 V
认证状态：	Not Qualified	座面最大高度：	0.8 mm
最大稳定时间：	8.5 µs	标称安定时间 (tstl)：	6 µs
子类别：	Other Converters	最大压摆率：	0.65 mA
标称供电电压：	3 V	表面贴装：	YES
技术：	CMOS	温度等级：	INDUSTRIAL
端子面层：	Matte Tin (Sn)	端子形式：	NO LEAD
端子节距：	0.5 mm	端子位置：	DUAL
处于峰值回流温度下的最长时间：	NOT SPECIFIED	宽度：	3 mm
Base Number Matches：	1

DAC124S085 数据手册

Note 9: Typical figures are at T_J= 25°C, and represent most likely parametric norms. Test limits are guaranteed to National's AOQL (Average Outgoing Quality

Level).

Note 10: This parameter is guaranteed by design and/or characterization and is not tested in production.

LSB = V_REF/ 2ⁿ

Specification Definitions

where V_REFis the supply voltage for this product, and "n" is

the DAC resolution in bits, which is 12 for the DAC124S085.

DIFFERENTIAL NON-LINEARITY (DNL) is the measure of

the maximum deviation from the ideal step size of 1 LSB,

MAXIMUM LOAD CAPACITANCE is the maximum capaci-

which is V_REF/ 4096 = V_A/ 4096.

tance that can be driven by the DAC with output stability

DAC-to-DAC CROSSTALK is the glitch impulse transferred

maintained.

to a DAC output in response to a full-scale change in the out-

MONOTONICITY is the condition of being monotonic, where

put of another DAC.

the DAC has an output that never decreases when the input

DIGITAL CROSSTALK is the glitch impulse transferred to a

code increases.

DAC output at mid-scale in response to a full-scale change in

MOST SIGNIFICANT BIT (MSB) is the bit that has the largest

value or weight of all bits in a word. Its value is 1/2 of V_A.

the input register of another DAC.

DIGITAL FEEDTHROUGH is a measure of the energy inject-

ed into the analog output of the DAC from the digital inputs

MULTIPLYING BANDWIDTH is the frequency at which the

output amplitude falls 3dB below the input sine wave on

when the DAC outputs are not updated. It is measured with a

V_REFINwith a full-scale code loaded into the DAC.

full-scale code change on the data bus.

POWER EFFICIENCY is the ratio of the output current to the

FULL-SCALE ERROR is the difference between the actual

total supply current. The output current comes from the power

output voltage with a full scale code (FFFh) loaded into the

supply. The difference between the supply and output cur-

DAC and the value of V_Ax 4095 / 4096.

rents is the power consumed by the device without a load.

GAIN ERROR is the deviation from the ideal slope of the

transfer function. It can be calculated from Zero and Full-

SETTLING TIME is the time for the output to settle to within

1/2 LSB of the final value after the input code is updated.

Scale Errors as GE = FSE - ZE, where GE is Gain error, FSE

TOTAL HARMONIC DISTORTION (THD) is the measure of

the harmonics present at the output of the DACs with an ideal

sine wave applied to V_REFIN. THD is measured in dB.

is Full-Scale Error and ZE is Zero Error.

GLITCH IMPULSE is the energy injected into the analog out-

put when the input code to the DAC register changes. It is

specified as the area of the glitch in nanovolt-seconds.

WAKE-UP TIME is the time for the output to exit power-down

mode. This is the time from the falling edge of the 16th SCLK

pulse to when the output voltage deviates from the power-

down voltage of 0V.

INTEGRAL NON-LINEARITY (INL) is a measure of the de-

viation of each individual code from a straight line through the

input to output transfer function. The deviation of any given

code from this straight line is measured from the center of that

code value. The end point method is used. INL for this product

is specified over a limited range, per the Electrical Tables.

ZERO CODE ERROR is the output error, or voltage, present

at the DAC output after a code of 000h has been entered.

LEAST SIGNIFICANT BIT (LSB) is the bit that has the small-

est value or weight of all bits in a word. This value is

www.national.com

1...4 5 678 9 10...20

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与DAC124S085相关器件

型号	品牌	描述	获取价格	数据表
DAC124S085_07	NSC	12-Bit Micro Power QUAD Digital-to-Analog Converter with Rail-to-Rail Output	获取价格
DAC124S085CIMM	NSC	12-Bit Micro Power QUAD Digital-to-Analog Converter with Rail-to-Rail Output	获取价格
DAC124S085CIMM	TI	具有轨至轨输出的 12 位微功耗四通道数模转换器 (DAC) \| DGS \| 10 \| -	获取价格
DAC124S085CIMM/NOPB	NSC	IC SERIAL INPUT LOADING, 6 us SETTLING TIME, 12-BIT DAC, PDSO10, MSOP-10, Digital to Analo	获取价格
DAC124S085CIMM/NOPB	TI	具有轨至轨输出的 12 位微功耗四通道数模转换器 (DAC) \| DGS \| 10 \| -	获取价格
DAC124S085CIMMX	NSC	12-Bit Micro Power QUAD Digital-to-Analog Converter with Rail-to-Rail Output	获取价格

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