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CY8C20667S-24LQXI PDF预览

CY8C20667S-24LQXI

更新时间: 2023-12-06 20:12:52
品牌 Logo 应用领域
英飞凌 - INFINEON /
页数 文件大小 规格书
46页 1181K
描述
CY8C20xx7/S

CY8C20667S-24LQXI 数据手册

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CY8C20xx7/S  
Additional System Resources  
Getting Started  
System resources provide additional capability, such as  
configurable I2C slave, SPI master/slave communication  
interface, three 16-bit programmable timers, various system  
resets supported by the M8C low voltage detection and power-  
on reset. The merits of each system resource are listed here:  
The quickest way to understand PSoC silicon is to read this  
datasheet and then use the PSoC Designer Integrated  
Development Environment (IDE). This datasheet is an overview  
of the PSoC integrated circuit and presents specific pin, register,  
and electrical specifications.  
The I2C slave/SPI master-slave module provides 50/100/  
400 kHz communication over two wires. SPI communication  
over three or four wires runs at speeds of 46.9 kHz to 3 MHz  
(lower for a slower system clock).  
For in depth information, along with detailed programming  
details, see the Technical Reference Manual for the CY8C20x37/  
47/67/S PSoC devices.  
For up-to-date ordering, packaging, and electrical specification  
information, see the latest PSoC device datasheets on the web  
at www.cypress.com/psoc.  
The I2C hardware address recognition feature reduces the  
already low power consumption by eliminating the need for  
CPU intervention until a packet addressed to the target device  
is received.  
Application Notes/Design Guides  
The I2C enhanced slave interface appears as a 32-byte RAM  
buffer to the external I2C master. Using a simple predefined  
protocol, the master controls the read and write pointers into  
the RAM. When this method is enabled, the slave does not stall  
the bus when receiving data bytes in active mode. For more  
details, refer to the I2CSBUF User Module datasheet.  
Application notes and design guides are an excellent  
introduction to the wide variety of possible PSoC designs. They  
are located at www.cypress.com/gocapsense. Select  
Application Notes under the Related Documentation tab.  
Development Kits  
PSoC Development Kits are available online from Cypress at  
www.cypress.com/shop and through a growing number of  
regional and global distributors, which includeArrow, Avnet, Digi-  
Key, Farnell, Future Electronics, and Newark. See “Development  
Kits” on page 32.  
Low-voltage detection (LVD) interrupts can signal the  
application of falling voltage levels, while the advanced power-  
on reset (POR) circuit eliminates the need for a system  
supervisor.  
An internal reference provides an absolute reference for  
capacitive sensing.  
Training  
Free PSoC and CapSense technical training (on demand,  
webinars, and workshops) is available online at  
www.cypress.com/training. The training covers a wide variety of  
topics and skill levels to assist you in your designs.  
A register-controlled bypass mode allows the user to disable  
the LDO regulator.  
CYPros Consultants  
Certified PSoC Consultants offer everything from technical  
assistance to completed PSoC designs. To contact or become a  
PSoC Consultant go to www.cypress.com/cypros.  
Solutions Library  
Visit our growing library of solution focused designs at  
www.cypress.com/solutions. Here you can find various  
application designs that include firmware and hardware design  
files that enable you to complete your designs quickly.  
Technical Support  
For assistance with technical issues, search KnowledgeBase  
articles and forums at www.cypress.com/support. If you cannot  
find an answer to your question, create a technical support case  
or call technical support at 1-800-541-4736.  
Document Number: 001-69257 Rev. *Q  
Page 5 of 46  

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